mb/google/puff: Convert ASL file to new DPTF dt impl
This patch converts the current DPTF policies from static ASL files into the new SSDT-based DPTF implementation. All settings are intended to be copied exactly. BUG=b:158986928 BRANCH=puff TEST=duffy boots and dumped SSDT table for quick check. Change-Id: I45987f44ec381917173f8d2a878edb50da454b4b Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44905 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Edward O'Callaghan
Edward O'Callaghan
parent
53c4db0555
commit
b7a68d5b05
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@ -12,6 +12,8 @@ config BOARD_GOOGLE_BASEBOARD_PUFF
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select ROMSTAGE_SPD_SMBUS
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select SPD_READ_BY_WORD
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select SOC_INTEL_CSE_LITE_SKU
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select DRIVERS_INTEL_DPTF
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select DPTF_USE_EISA_HID
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config BOARD_GOOGLE_HATCH_COMMON
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def_bool n
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@ -38,6 +40,7 @@ config BOARD_GOOGLE_HATCH_COMMON
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select MAINBOARD_HAS_TPM2
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select MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE
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select SOC_INTEL_COMETLAKE
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select SOC_INTEL_COMMON_BLOCK_DTT
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if BOARD_GOOGLE_HATCH_COMMON
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@ -48,6 +48,7 @@ DefinitionBlock(
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#include <ec/google/chromeec/acpi/ec.asl>
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}
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#if CONFIG(BOARD_GOOGLE_BASEBOARD_HATCH)
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/* Dynamic Platform Thermal Framework */
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Scope (\_SB)
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{
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@ -56,4 +57,5 @@ DefinitionBlock(
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/* Include common dptf ASL files */
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#include <soc/intel/common/acpi/dptf/dptf.asl>
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}
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#endif
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}
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@ -1,97 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#define DPTF_CPU_PASSIVE 93
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#define DPTF_CPU_CRITICAL 100
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#define DPTF_CPU_ACTIVE_AC0 90
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#define DPTF_CPU_ACTIVE_AC1 85
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#define DPTF_CPU_ACTIVE_AC2 80
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#define DPTF_CPU_ACTIVE_AC3 75
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#define DPTF_CPU_ACTIVE_AC4 70
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#define DPTF_CPU_ACTIVE_AC5 65
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#define DPTF_TSR0_SENSOR_ID 0
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#define DPTF_TSR0_SENSOR_NAME "Thermal Sensor 1"
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#define DPTF_TSR0_PASSIVE 65
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#define DPTF_TSR0_CRITICAL 75
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#define DPTF_TSR0_ACTIVE_AC0 50
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#define DPTF_TSR0_ACTIVE_AC1 47
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#define DPTF_TSR0_ACTIVE_AC2 45
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#define DPTF_TSR0_ACTIVE_AC3 42
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#define DPTF_TSR0_ACTIVE_AC4 39
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#define DPTF_ENABLE_CHARGER
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#define DPTF_ENABLE_FAN_CONTROL
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/* Charger performance states, board-specific values from charger and EC */
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Name (CHPS, Package () {
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Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */
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Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */
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Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */
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Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */
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})
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/* DFPS: Fan Performance States */
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Name (DFPS, Package () {
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0, // Revision
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/*
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* TODO : Need to update this Table after characterization.
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* These are initial reference values.
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*/
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/* Control, Trip Point, Speed, NoiseLevel, Power */
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Package () {90, 0xFFFFFFFF, 6700, 220, 2200},
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Package () {80, 0xFFFFFFFF, 5800, 180, 1800},
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Package () {70, 0xFFFFFFFF, 5000, 145, 1450},
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Package () {60, 0xFFFFFFFF, 4900, 115, 1150},
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Package () {50, 0xFFFFFFFF, 3838, 90, 900},
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Package () {40, 0xFFFFFFFF, 2904, 55, 550},
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Package () {30, 0xFFFFFFFF, 2337, 30, 300},
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Package () {20, 0xFFFFFFFF, 1608, 15, 150},
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Package () {10, 0xFFFFFFFF, 800, 10, 100},
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Package () {0, 0xFFFFFFFF, 0, 0, 50}
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})
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Name (DART, Package () {
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/* Fan effect on CPU */
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0, // Revision
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Package () {
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/*
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* Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6,
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* AC7, AC8, AC9
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*/
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\_SB.DPTF.TFN1, \_SB.PCI0.TCPU, 95, 85, 75, 65, 55, 45, 0, 0,
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0, 0, 0
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},
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Package () {
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\_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 95, 85, 75, 65, 55, 45, 0, 0,
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0, 0, 0
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}
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})
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Name (DTRT, Package () {
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/* CPU Throttle Effect on CPU */
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Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 50, 0, 0, 0, 0 },
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/* CPU Throttle Effect on Ambient (TSR0) */
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Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 60, 0, 0, 0, 0 },
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})
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Name (MPPC, Package ()
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{
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0x2, /* Revision */
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Package () { /* Power Limit 1 */
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0, /* PowerLimitIndex, 0 for Power Limit 1 */
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15000, /* PowerLimitMinimum */
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15000, /* PowerLimitMaximum */
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28000, /* TimeWindowMinimum */
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32000, /* TimeWindowMaximum */
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200 /* StepSize */
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},
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Package () { /* Power Limit 2 */
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1, /* PowerLimitIndex, 1 for Power Limit 2 */
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25000, /* PowerLimitMinimum */
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64000, /* PowerLimitMaximum */
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28000, /* TimeWindowMinimum */
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32000, /* TimeWindowMaximum */
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1000 /* StepSize */
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}
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})
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@ -1,3 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <puff/acpi/dptf.asl>
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@ -267,6 +267,71 @@ chip soc/intel/cannonlake
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register "sata_port[1].TxGen3DeEmph" = "0x20"
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device domain 0 on
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device pci 04.0 on
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chip drivers/intel/dptf
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## Active Policy
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register "policies.active[0]" = "{.target=DPTF_CPU,
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.thresholds={TEMP_PCT(90, 85),
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TEMP_PCT(85, 75),
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TEMP_PCT(80, 65),
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TEMP_PCT(75, 55),
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TEMP_PCT(70, 45),}}"
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register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0,
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.thresholds={TEMP_PCT(50, 85),
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TEMP_PCT(47, 75),
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TEMP_PCT(45, 65),
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TEMP_PCT(42, 55),
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TEMP_PCT(39, 45),}}"
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## Passive Policy
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register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)"
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register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)"
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## Critical Policy
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register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
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register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)"
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## Power Limits Control
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# PL1 is fixed at 15W, avg over 28-32s interval
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# 25-64W PL2 in 1000mW increments, avg over 28-32s interval
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register "controls.power_limits.pl1" = "{
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.min_power = 15000,
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.max_power = 15000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,}"
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register "controls.power_limits.pl2" = "{
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.min_power = 25000,
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.max_power = 64000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf[0]" = "{ 255, 1700 }"
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register "controls.charger_perf[1]" = "{ 24, 1500 }"
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register "controls.charger_perf[2]" = "{ 16, 1000 }"
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register "controls.charger_perf[3]" = "{ 8, 500 }"
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## Fan Performance Control (Percent, Speed, Noise, Power)
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register "controls.fan_perf[0]" = "{ 90, 6700, 220, 2200, }"
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register "controls.fan_perf[1]" = "{ 80, 5800, 180, 1800, }"
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register "controls.fan_perf[2]" = "{ 70, 5000, 145, 1450, }"
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register "controls.fan_perf[3]" = "{ 60, 4900, 115, 1150, }"
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register "controls.fan_perf[4]" = "{ 50, 3838, 90, 900, }"
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register "controls.fan_perf[5]" = "{ 40, 2904, 55, 550, }"
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register "controls.fan_perf[6]" = "{ 30, 2337, 30, 300, }"
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register "controls.fan_perf[7]" = "{ 20, 1608, 15, 150, }"
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register "controls.fan_perf[8]" = "{ 10, 800, 10, 100, }"
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register "controls.fan_perf[9]" = "{ 0, 0, 0, 50, }"
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# Fan options
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register "options.fan.fine_grained_control" = "1"
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register "options.fan.step_size" = "2"
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device generic 0 on end
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end
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end # DPTF 0x1903
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device pci 14.0 on
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chip drivers/usb/acpi
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device usb 0.0 on
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@ -1,86 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#define DPTF_CPU_PASSIVE 90
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#define DPTF_CPU_CRITICAL 100
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#define DPTF_TSR0_SENSOR_ID 0
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#define DPTF_TSR0_SENSOR_NAME "Thermal Sensor 1"
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#define DPTF_TSR0_PASSIVE 60
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#define DPTF_TSR0_CRITICAL 85
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#define DPTF_ENABLE_CHARGER
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#define DPTF_ENABLE_FAN_CONTROL
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/* Charger performance states, board-specific values from charger and EC */
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Name (CHPS, Package () {
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Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */
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Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */
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Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */
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Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */
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})
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/* DFPS: Fan Performance States */
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Name (DFPS, Package () {
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0, // Revision
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/*
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* TODO : Need to update this Table after characterization.
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* These are initial reference values.
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*/
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/* Control, Trip Point, Speed, NoiseLevel, Power */
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Package () {90, 0xFFFFFFFF, 6700, 220, 2200},
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Package () {80, 0xFFFFFFFF, 5800, 180, 1800},
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Package () {70, 0xFFFFFFFF, 5000, 145, 1450},
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Package () {60, 0xFFFFFFFF, 4900, 115, 1150},
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Package () {50, 0xFFFFFFFF, 3838, 90, 900},
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Package () {40, 0xFFFFFFFF, 2904, 55, 550},
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Package () {30, 0xFFFFFFFF, 2337, 30, 300},
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Package () {20, 0xFFFFFFFF, 1608, 15, 150},
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Package () {10, 0xFFFFFFFF, 800, 10, 100},
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Package () {0, 0xFFFFFFFF, 0, 0, 50}
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})
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Name (DART, Package () {
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/* Fan effect on CPU */
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0, // Revision
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Package () {
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/*
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* Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6,
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* AC7, AC8, AC9
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*/
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\_SB.DPTF.TFN1, \_SB.PCI0.TCPU, 95, 85, 75, 65, 55, 45, 0, 0,
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0, 0, 0
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},
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Package () {
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\_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 95, 85, 75, 65, 55, 45, 0, 0,
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0, 0, 0
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}
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})
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Name (DTRT, Package () {
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/* CPU Throttle Effect on CPU */
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Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 50, 0, 0, 0, 0 },
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/* CPU Throttle Effect on Ambient (TSR0) */
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Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 60, 0, 0, 0, 0 },
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})
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Name (MPPC, Package ()
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{
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0x2, /* Revision */
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Package () { /* Power Limit 1 */
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0, /* PowerLimitIndex, 0 for Power Limit 1 */
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10000, /* PowerLimitMinimum */
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15000, /* PowerLimitMaximum */
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28000, /* TimeWindowMinimum */
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32000, /* TimeWindowMaximum */
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200 /* StepSize */
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},
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Package () { /* Power Limit 2 */
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1, /* PowerLimitIndex, 1 for Power Limit 2 */
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25000, /* PowerLimitMinimum */
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51000, /* PowerLimitMaximum */
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28000, /* TimeWindowMinimum */
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32000, /* TimeWindowMaximum */
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1000 /* StepSize */
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}
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})
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@ -273,6 +273,41 @@ chip soc/intel/cannonlake
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register "sata_port[1].TxGen3DeEmph" = "0x20"
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device domain 0 on
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device pci 04.0 on
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chip drivers/intel/dptf
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## Passive Policy
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register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 90, 5000)"
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register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 60, 5000)"
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## Critical Policy
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register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
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register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN)"
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## Power Limits Control
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# 10-15W PL1 in 200mW increments, avg over 28-32s interval
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# 25-51W PL2 in 1000mW increments, avg over 28-32s interval
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register "controls.power_limits.pl1" = "{
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.min_power = 10000,
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.max_power = 15000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,}"
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register "controls.power_limits.pl2" = "{
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.min_power = 25000,
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.max_power = 51000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf[0]" = "{ 255, 1700 }"
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register "controls.charger_perf[1]" = "{ 24, 1500 }"
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register "controls.charger_perf[2]" = "{ 16, 1000 }"
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register "controls.charger_perf[3]" = "{ 8, 500 }"
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device generic 0 on end
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end
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end # DPTF 0x1903
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device pci 14.0 on
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chip drivers/usb/acpi
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device usb 0.0 on
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@ -1,3 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <puff/acpi/dptf.asl>
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@ -267,6 +267,71 @@ chip soc/intel/cannonlake
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register "sata_port[1].TxGen3DeEmph" = "0x20"
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device domain 0 on
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device pci 04.0 on
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chip drivers/intel/dptf
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## Active Policy
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register "policies.active[0]" = "{.target=DPTF_CPU,
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.thresholds={TEMP_PCT(90, 85),
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TEMP_PCT(85, 75),
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TEMP_PCT(80, 65),
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TEMP_PCT(75, 55),
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TEMP_PCT(70, 45),}}"
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register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0,
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.thresholds={TEMP_PCT(50, 85),
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TEMP_PCT(47, 75),
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TEMP_PCT(45, 65),
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TEMP_PCT(42, 55),
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TEMP_PCT(39, 45),}}"
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## Passive Policy
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register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)"
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register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)"
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## Critical Policy
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register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
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register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)"
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## Power Limits Control
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# PL1 is fixed at 15W, avg over 28-32s interval
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# 25-64W PL2 in 1000mW increments, avg over 28-32s interval
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register "controls.power_limits.pl1" = "{
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.min_power = 15000,
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.max_power = 15000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,}"
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register "controls.power_limits.pl2" = "{
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.min_power = 25000,
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.max_power = 64000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf[0]" = "{ 255, 1700 }"
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register "controls.charger_perf[1]" = "{ 24, 1500 }"
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register "controls.charger_perf[2]" = "{ 16, 1000 }"
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register "controls.charger_perf[3]" = "{ 8, 500 }"
|
||||
|
||||
## Fan Performance Control (Percent, Speed, Noise, Power)
|
||||
register "controls.fan_perf[0]" = "{ 90, 6700, 220, 2200, }"
|
||||
register "controls.fan_perf[1]" = "{ 80, 5800, 180, 1800, }"
|
||||
register "controls.fan_perf[2]" = "{ 70, 5000, 145, 1450, }"
|
||||
register "controls.fan_perf[3]" = "{ 60, 4900, 115, 1150, }"
|
||||
register "controls.fan_perf[4]" = "{ 50, 3838, 90, 900, }"
|
||||
register "controls.fan_perf[5]" = "{ 40, 2904, 55, 550, }"
|
||||
register "controls.fan_perf[6]" = "{ 30, 2337, 30, 300, }"
|
||||
register "controls.fan_perf[7]" = "{ 20, 1608, 15, 150, }"
|
||||
register "controls.fan_perf[8]" = "{ 10, 800, 10, 100, }"
|
||||
register "controls.fan_perf[9]" = "{ 0, 0, 0, 50, }"
|
||||
|
||||
# Fan options
|
||||
register "options.fan.fine_grained_control" = "1"
|
||||
register "options.fan.step_size" = "2"
|
||||
|
||||
device generic 0 on end
|
||||
end
|
||||
end # DPTF 0x1903
|
||||
device pci 14.0 on
|
||||
chip drivers/usb/acpi
|
||||
device usb 0.0 on
|
||||
|
|
|
|||
|
|
@ -1,3 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <puff/acpi/dptf.asl>
|
||||
|
|
@ -193,6 +193,71 @@ chip soc/intel/cannonlake
|
|||
register "sata_port[1].TxGen3DeEmph" = "0x20"
|
||||
|
||||
device domain 0 on
|
||||
device pci 04.0 on
|
||||
chip drivers/intel/dptf
|
||||
## Active Policy
|
||||
register "policies.active[0]" = "{.target=DPTF_CPU,
|
||||
.thresholds={TEMP_PCT(90, 85),
|
||||
TEMP_PCT(85, 75),
|
||||
TEMP_PCT(80, 65),
|
||||
TEMP_PCT(75, 55),
|
||||
TEMP_PCT(70, 45),}}"
|
||||
register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0,
|
||||
.thresholds={TEMP_PCT(50, 85),
|
||||
TEMP_PCT(47, 75),
|
||||
TEMP_PCT(45, 65),
|
||||
TEMP_PCT(42, 55),
|
||||
TEMP_PCT(39, 45),}}"
|
||||
|
||||
## Passive Policy
|
||||
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)"
|
||||
register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)"
|
||||
|
||||
## Critical Policy
|
||||
register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
|
||||
register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)"
|
||||
|
||||
## Power Limits Control
|
||||
# PL1 is fixed at 15W, avg over 28-32s interval
|
||||
# 25-64W PL2 in 1000mW increments, avg over 28-32s interval
|
||||
register "controls.power_limits.pl1" = "{
|
||||
.min_power = 15000,
|
||||
.max_power = 15000,
|
||||
.time_window_min = 28 * MSECS_PER_SEC,
|
||||
.time_window_max = 32 * MSECS_PER_SEC,
|
||||
.granularity = 200,}"
|
||||
register "controls.power_limits.pl2" = "{
|
||||
.min_power = 25000,
|
||||
.max_power = 64000,
|
||||
.time_window_min = 28 * MSECS_PER_SEC,
|
||||
.time_window_max = 32 * MSECS_PER_SEC,
|
||||
.granularity = 1000,}"
|
||||
|
||||
## Charger Performance Control (Control, mA)
|
||||
register "controls.charger_perf[0]" = "{ 255, 1700 }"
|
||||
register "controls.charger_perf[1]" = "{ 24, 1500 }"
|
||||
register "controls.charger_perf[2]" = "{ 16, 1000 }"
|
||||
register "controls.charger_perf[3]" = "{ 8, 500 }"
|
||||
|
||||
## Fan Performance Control (Percent, Speed, Noise, Power)
|
||||
register "controls.fan_perf[0]" = "{ 90, 6700, 220, 2200, }"
|
||||
register "controls.fan_perf[1]" = "{ 80, 5800, 180, 1800, }"
|
||||
register "controls.fan_perf[2]" = "{ 70, 5000, 145, 1450, }"
|
||||
register "controls.fan_perf[3]" = "{ 60, 4900, 115, 1150, }"
|
||||
register "controls.fan_perf[4]" = "{ 50, 3838, 90, 900, }"
|
||||
register "controls.fan_perf[5]" = "{ 40, 2904, 55, 550, }"
|
||||
register "controls.fan_perf[6]" = "{ 30, 2337, 30, 300, }"
|
||||
register "controls.fan_perf[7]" = "{ 20, 1608, 15, 150, }"
|
||||
register "controls.fan_perf[8]" = "{ 10, 800, 10, 100, }"
|
||||
register "controls.fan_perf[9]" = "{ 0, 0, 0, 50, }"
|
||||
|
||||
# Fan options
|
||||
register "options.fan.fine_grained_control" = "1"
|
||||
register "options.fan.step_size" = "2"
|
||||
|
||||
device generic 0 on end
|
||||
end
|
||||
end # DPTF 0x1903
|
||||
device pci 14.0 on
|
||||
chip drivers/usb/acpi
|
||||
device usb 0.0 on
|
||||
|
|
|
|||
|
|
@ -1,3 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <puff/acpi/dptf.asl>
|
||||
|
|
@ -205,6 +205,71 @@ chip soc/intel/cannonlake
|
|||
register "sata_port[1].TxGen3DeEmph" = "0x20"
|
||||
|
||||
device domain 0 on
|
||||
device pci 04.0 on
|
||||
chip drivers/intel/dptf
|
||||
## Active Policy
|
||||
register "policies.active[0]" = "{.target=DPTF_CPU,
|
||||
.thresholds={TEMP_PCT(90, 85),
|
||||
TEMP_PCT(85, 75),
|
||||
TEMP_PCT(80, 65),
|
||||
TEMP_PCT(75, 55),
|
||||
TEMP_PCT(70, 45),}}"
|
||||
register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0,
|
||||
.thresholds={TEMP_PCT(50, 85),
|
||||
TEMP_PCT(47, 75),
|
||||
TEMP_PCT(45, 65),
|
||||
TEMP_PCT(42, 55),
|
||||
TEMP_PCT(39, 45),}}"
|
||||
|
||||
## Passive Policy
|
||||
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)"
|
||||
register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)"
|
||||
|
||||
## Critical Policy
|
||||
register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
|
||||
register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)"
|
||||
|
||||
## Power Limits Control
|
||||
# PL1 is fixed at 15W, avg over 28-32s interval
|
||||
# 25-64W PL2 in 1000mW increments, avg over 28-32s interval
|
||||
register "controls.power_limits.pl1" = "{
|
||||
.min_power = 15000,
|
||||
.max_power = 15000,
|
||||
.time_window_min = 28 * MSECS_PER_SEC,
|
||||
.time_window_max = 32 * MSECS_PER_SEC,
|
||||
.granularity = 200,}"
|
||||
register "controls.power_limits.pl2" = "{
|
||||
.min_power = 25000,
|
||||
.max_power = 64000,
|
||||
.time_window_min = 28 * MSECS_PER_SEC,
|
||||
.time_window_max = 32 * MSECS_PER_SEC,
|
||||
.granularity = 1000,}"
|
||||
|
||||
## Charger Performance Control (Control, mA)
|
||||
register "controls.charger_perf[0]" = "{ 255, 1700 }"
|
||||
register "controls.charger_perf[1]" = "{ 24, 1500 }"
|
||||
register "controls.charger_perf[2]" = "{ 16, 1000 }"
|
||||
register "controls.charger_perf[3]" = "{ 8, 500 }"
|
||||
|
||||
## Fan Performance Control (Percent, Speed, Noise, Power)
|
||||
register "controls.fan_perf[0]" = "{ 90, 6700, 220, 2200, }"
|
||||
register "controls.fan_perf[1]" = "{ 80, 5800, 180, 1800, }"
|
||||
register "controls.fan_perf[2]" = "{ 70, 5000, 145, 1450, }"
|
||||
register "controls.fan_perf[3]" = "{ 60, 4900, 115, 1150, }"
|
||||
register "controls.fan_perf[4]" = "{ 50, 3838, 90, 900, }"
|
||||
register "controls.fan_perf[5]" = "{ 40, 2904, 55, 550, }"
|
||||
register "controls.fan_perf[6]" = "{ 30, 2337, 30, 300, }"
|
||||
register "controls.fan_perf[7]" = "{ 20, 1608, 15, 150, }"
|
||||
register "controls.fan_perf[8]" = "{ 10, 800, 10, 100, }"
|
||||
register "controls.fan_perf[9]" = "{ 0, 0, 0, 50, }"
|
||||
|
||||
# Fan options
|
||||
register "options.fan.fine_grained_control" = "1"
|
||||
register "options.fan.step_size" = "2"
|
||||
|
||||
device generic 0 on end
|
||||
end
|
||||
end # DPTF 0x1903
|
||||
device pci 14.0 on
|
||||
chip drivers/usb/acpi
|
||||
device usb 0.0 on
|
||||
|
|
|
|||
|
|
@ -1,3 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <puff/acpi/dptf.asl>
|
||||
|
|
@ -200,6 +200,71 @@ chip soc/intel/cannonlake
|
|||
register "sata_port[1].TxGen3DeEmph" = "0x20"
|
||||
|
||||
device domain 0 on
|
||||
device pci 04.0 on
|
||||
chip drivers/intel/dptf
|
||||
## Active Policy
|
||||
register "policies.active[0]" = "{.target=DPTF_CPU,
|
||||
.thresholds={TEMP_PCT(90, 85),
|
||||
TEMP_PCT(85, 75),
|
||||
TEMP_PCT(80, 65),
|
||||
TEMP_PCT(75, 55),
|
||||
TEMP_PCT(70, 45),}}"
|
||||
register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0,
|
||||
.thresholds={TEMP_PCT(50, 85),
|
||||
TEMP_PCT(47, 75),
|
||||
TEMP_PCT(45, 65),
|
||||
TEMP_PCT(42, 55),
|
||||
TEMP_PCT(39, 45),}}"
|
||||
|
||||
## Passive Policy
|
||||
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)"
|
||||
register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)"
|
||||
|
||||
## Critical Policy
|
||||
register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
|
||||
register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)"
|
||||
|
||||
## Power Limits Control
|
||||
# PL1 is fixed at 15W, avg over 28-32s interval
|
||||
# 25-64W PL2 in 1000mW increments, avg over 28-32s interval
|
||||
register "controls.power_limits.pl1" = "{
|
||||
.min_power = 15000,
|
||||
.max_power = 15000,
|
||||
.time_window_min = 28 * MSECS_PER_SEC,
|
||||
.time_window_max = 32 * MSECS_PER_SEC,
|
||||
.granularity = 200,}"
|
||||
register "controls.power_limits.pl2" = "{
|
||||
.min_power = 25000,
|
||||
.max_power = 64000,
|
||||
.time_window_min = 28 * MSECS_PER_SEC,
|
||||
.time_window_max = 32 * MSECS_PER_SEC,
|
||||
.granularity = 1000,}"
|
||||
|
||||
## Charger Performance Control (Control, mA)
|
||||
register "controls.charger_perf[0]" = "{ 255, 1700 }"
|
||||
register "controls.charger_perf[1]" = "{ 24, 1500 }"
|
||||
register "controls.charger_perf[2]" = "{ 16, 1000 }"
|
||||
register "controls.charger_perf[3]" = "{ 8, 500 }"
|
||||
|
||||
## Fan Performance Control (Percent, Speed, Noise, Power)
|
||||
register "controls.fan_perf[0]" = "{ 90, 6700, 220, 2200, }"
|
||||
register "controls.fan_perf[1]" = "{ 80, 5800, 180, 1800, }"
|
||||
register "controls.fan_perf[2]" = "{ 70, 5000, 145, 1450, }"
|
||||
register "controls.fan_perf[3]" = "{ 60, 4900, 115, 1150, }"
|
||||
register "controls.fan_perf[4]" = "{ 50, 3838, 90, 900, }"
|
||||
register "controls.fan_perf[5]" = "{ 40, 2904, 55, 550, }"
|
||||
register "controls.fan_perf[6]" = "{ 30, 2337, 30, 300, }"
|
||||
register "controls.fan_perf[7]" = "{ 20, 1608, 15, 150, }"
|
||||
register "controls.fan_perf[8]" = "{ 10, 800, 10, 100, }"
|
||||
register "controls.fan_perf[9]" = "{ 0, 0, 0, 50, }"
|
||||
|
||||
# Fan options
|
||||
register "options.fan.fine_grained_control" = "1"
|
||||
register "options.fan.step_size" = "2"
|
||||
|
||||
device generic 0 on end
|
||||
end
|
||||
end # DPTF 0x1903
|
||||
device pci 14.0 on
|
||||
chip drivers/usb/acpi
|
||||
device usb 0.0 on
|
||||
|
|
|
|||
Loading…
Reference in New Issue