cannonlake mainboards: Set PMC as hidden in devicetree

FSP-S hides the PMC from the PCI bus when it runs, but there are still
initialization steps coreboot programs for the PMC. Therefore, change
all of the cannonlake mainboards to set the PMC as hidden in the
devicetree, which means the device will be skipped during enumeration,
but device callbacks are still issued as if the device were enabled.

TEST=Ran full patch train on google/dratini, disassembled SSDT and the
PEPD device matches what is in pep.asl. Also verified via dmesg that the
INT33A1 device is still initialized by the kernel.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ib4a20ce9075ce7653388a5d3e281fe774bf89355
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56008
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Tim Wawrzynczak 2021-07-01 08:38:30 -06:00
parent 72d94026ce
commit b7b5115360
12 changed files with 12 additions and 12 deletions

View File

@ -457,7 +457,7 @@ chip soc/intel/cannonlake
end
end # LPC/eSPI
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI

View File

@ -346,7 +346,7 @@ chip soc/intel/cannonlake
end
end # eSPI Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI

View File

@ -394,7 +394,7 @@ chip soc/intel/cannonlake
end
end # LPC/eSPI
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI

View File

@ -423,7 +423,7 @@ chip soc/intel/cannonlake
end
end # LPC/eSPI
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI

View File

@ -71,7 +71,7 @@ chip soc/intel/cannonlake
end
end # LPC Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI

View File

@ -273,7 +273,7 @@ chip soc/intel/cannonlake
end
end
device pci 1f.1 off end # P2SB
device pci 1f.2 off end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on # Intel HDA
register "PchHdaAudioLinkHda" = "1"
end

View File

@ -227,7 +227,7 @@ chip soc/intel/cannonlake
device pci 1e.3 off end # GSPI #1
device pci 1f.0 on end # LPC Bridge
device pci 1f.1 off end # P2SB
device pci 1f.2 off end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on # Intel HDA
register "PchHdaAudioLinkHda" = "1"
end

View File

@ -201,7 +201,7 @@ chip soc/intel/cannonlake
end
end
device pci 1f.1 off end # P2SB
device pci 1f.2 off end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on # Intel HDA
register "PchHdaAudioLinkHda" = "1"
register "PchHdaAudioLinkDmic0" = "1"

View File

@ -188,7 +188,7 @@ chip soc/intel/cannonlake
end
end
device pci 1f.1 off end # P2SB
device pci 1f.2 off end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on # Intel HDA
register "PchHdaAudioLinkHda" = "1"
end

View File

@ -189,7 +189,7 @@ chip soc/intel/cannonlake
end
end
device pci 1f.1 off end # P2SB
device pci 1f.2 off end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on # Intel HDA
subsystemid 0x1558 0x96e1
register "PchHdaAudioLinkHda" = "1"

View File

@ -204,7 +204,7 @@ chip soc/intel/cannonlake
end
end
device pci 1f.1 off end # P2SB
device pci 1f.2 off end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on # Intel HDA
register "PchHdaAudioLinkHda" = "1"
end

View File

@ -167,7 +167,7 @@ chip soc/intel/cannonlake
end
end
device pci 1f.1 off end # P2SB
device pci 1f.2 off end # Power Management Controller
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on # Intel HDA
register "PchHdaAudioLinkHda" = "1"
register "PchHdaAudioLinkDmic0" = "1"