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mb/starlabs/lite/glkr: Configure LPC IO registers 

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I2d949af0086c231e27ac889c0aabd0d3e00c94fd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Sean Rhodes 2022-06-06 08:38:49 +01:00 committed by Felix Held
parent 7a82a805b8
commit b7c1a3aee9
1 changed files with 3 additions and 0 deletions
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src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
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@ -127,6 +127,9 @@ chip soc/intel/apollolake
device pci 1c.0 off end # eMMC
device pci 1e.0 off end # SDIO
device pci 1f.0 on # LPC Interface
register "gen1_dec" = "0x000c06a1"
register "gen2_dec" = "0x000c0081"
chip ec/starlabs/merlin
# Port pair 4Eh/4Fh
device pnp 4e.00 on end # IO Interface