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mb/google/hatch: Fine-tune Kohaku I2C CLK frequency 

Add rise time / fall time to I2C config in device tree to ensure I2C
CLK runs accurately at I2C_SPEED_FAST (400 kHz).

BUG=b:138258384
BRANCH=none
TEST=probe I2C0/I2C2/I2C3 SCL on Kohaku board, verify all of them run
at 395-399 kHz.

Change-Id: Id98079e717f0db3fdcb88f85e45693925d11d7fd
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34559
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Philip Chen 2019-07-24 14:35:44 -07:00 committed by Martin Roth
parent 43d07f75cf
commit b7ec252d37
1 changed files with 6 additions and 0 deletions
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6
src/mainboard/google/hatch/variants/kohaku/overridetree.cb
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@ -32,15 +32,21 @@ chip soc/intel/cannonlake
register "common_soc_config" = "{
.i2c[0] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 135,
.fall_time_ns = 45,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 95,
.fall_time_ns = 55,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 100,
.fall_time_ns = 20,
},
.gspi[0] = {
.speed_mhz = 1,