drivers/smbus: initialize SC16IS7XX I2C to UART converter chip
This patch adds the functionality to initialize the sc16is750 i2c to uart converter chip with a 14.7MHz input clock to support 115200 baud rate. Change-Id: Ib31188b8c0f9b0ce9454da984e630eca9101d145 Signed-off-by: Husni Faiz <ahamedhusni73@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67342 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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@ -311,14 +311,29 @@ if CONSOLE_I2C_SMBUS
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config CONSOLE_I2C_SMBUS_SLAVE_ADDRESS
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hex "I2C slave address of the logging device"
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default 0x48 if SC16IS7XX_INIT
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help
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I2C address of the device which logs the data.
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config CONSOLE_I2C_SMBUS_SLAVE_DATA_REGISTER
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hex "Data register address of the I2C logging device"
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default 0x00 if SC16IS7XX_INIT
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help
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This an 8-bit data register.
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config SC16IS7XX_INIT
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bool "Initialize SC16IS7XX I2C to UART converter chip"
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help
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SC16IS7XX is a slave I2C to UART converter chip. Enabling
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this option will initialize the chip.
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The default I2C slave address value 0x48 is the address of
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SC16IS7XX I2C to UART converter chip when the A1 and A0 pins
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are set to Vcc.
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The default data register address value 0x00 is the data
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register address of SC16IS7XX I2C to UART converter chip.
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endif # CONSOLE_I2C_SMBUS
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config CONSOLE_QEMU_DEBUGCON
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@ -1,3 +1,8 @@
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ifeq ($(CONFIG_SC16IS7XX_INIT),y)
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bootblock-y += sc16is7xx_init.c
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romstage-y += sc16is7xx_init.c
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endif
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ifeq ($(CONFIG_CONSOLE_I2C_SMBUS),y)
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all-y += i2c_smbus_console.c
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endif
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@ -3,8 +3,13 @@
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#include <console/i2c_smbus.h>
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#include <device/smbus_host.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include "sc16is7xx_init.h"
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void i2c_smbus_console_init(void) {}
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void i2c_smbus_console_init(void)
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{
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if (CONFIG(SC16IS7XX_INIT))
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sc16is7xx_init();
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}
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void i2c_smbus_console_tx_byte(unsigned char c)
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{
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@ -0,0 +1,62 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/i2c_smbus.h>
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#include <device/i2c.h>
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#include <device/smbus_host.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include "sc16is7xx_init.h"
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/*
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* Datasheet - SC16IS740/750/760, Rev. 7 - 9 June 2011
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* https://web.archive.org/web/20210612105830/https://www.nxp.com/docs/en/data-sheet/SC16IS740_750_760.pdf
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*/
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// Bits [6:3] of the subaddress is to address device internal registers
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#define INTERNAL_REG_SUB_ADDR_SHIFT 3
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#define REG_THR 0x00 // Transmit Holding Register
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#define REG_LCR 0x03 // Line Control Register
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// Special Register Set is accessible only when LCR[7] is logic 1
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#define REG_DLL 0x00 // divisor latch LSB
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#define REG_DLH 0x01 // divisor latch MSB
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#define LCR_WORD_LEN_BIT_0 BIT(0)
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#define LCR_WORD_LEN_BIT_1 BIT(1)
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#define LCR_STOP_BIT BIT(2)
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#define LCR_PARITY_BIT_0 BIT(3)
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#define LCR_PARITY_BIT_1 BIT(4)
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#define LCR_PARITY_BIT_2 BIT(5)
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#define LCR_BREAK_CTL_BIT BIT(6)
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#define LCR_SPEC_REG_SET_EN BIT(7)
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#define UART_8_N_1 (LCR_WORD_LEN_BIT_0 | LCR_WORD_LEN_BIT_1)
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/*
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* UART configuration: 8 bit word length, No parity, 1 stop bit (8-N-1)
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* Divisor value set here is calculated for 115200 baud rate
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* in 14.7MHz clock input to chip.
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*/
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#define BAUD_115200_DLL 0x08
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#define BAUD_115200_DLH 0x00
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void sc16is7xx_write_byte(uint8_t reg, unsigned char c)
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{
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do_smbus_write_byte(CONFIG_FIXED_SMBUS_IO_BASE,
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CONFIG_CONSOLE_I2C_SMBUS_SLAVE_ADDRESS, reg, c);
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}
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void sc16is7xx_init(void)
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{
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// Configure 8-N-1 and enable special register set
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sc16is7xx_write_byte(REG_LCR << INTERNAL_REG_SUB_ADDR_SHIFT,
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(UART_8_N_1 | LCR_SPEC_REG_SET_EN));
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sc16is7xx_write_byte(REG_DLL << INTERNAL_REG_SUB_ADDR_SHIFT, BAUD_115200_DLL);
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sc16is7xx_write_byte(REG_DLH << INTERNAL_REG_SUB_ADDR_SHIFT, BAUD_115200_DLH);
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// Disable special register set
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sc16is7xx_write_byte(REG_LCR << INTERNAL_REG_SUB_ADDR_SHIFT,
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(UART_8_N_1 & ~LCR_SPEC_REG_SET_EN));
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}
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@ -0,0 +1,11 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __DRIVERS_SMBUS_SC16IS7XX_INIT__
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#define __DRIVERS_SMBUS_SC16IS7XX_INIT__
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#include <types.h>
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void sc16is7xx_write_byte(uint8_t reg, unsigned char c);
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void sc16is7xx_init(void);
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#endif /* __DRIVERS_SMBUS_SC16IS7XX_INIT__ */
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