SPI/SST: Add OpCode Enable-Write-Status-Register (EWSR)
For SST chips, the Write-Status-Register instruction must be executed immediately after the execution of the Enable-Write-Status-Register instruction, instead of Write-Enable. Change-Id: I4b3473cd671829def3bd1641ececcf8d9dad4a56 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1919 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -20,6 +20,7 @@
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#define CMD_SST_WRDI 0x04 /* Write Disable */
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#define CMD_SST_RDSR 0x05 /* Read Status Register */
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#define CMD_SST_WRSR 0x01 /* Write Status Register */
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#define CMD_SST_EWSR 0x50 /* Enable Write Status Register */
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#define CMD_SST_READ 0x03 /* Read Data Bytes */
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#define CMD_SST_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
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#define CMD_SST_BP 0x02 /* Byte Program */
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@ -100,6 +101,15 @@ sst_enable_writing(struct spi_flash *flash)
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return ret;
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}
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static int
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sst_enable_writing_status(struct spi_flash *flash)
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{
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int ret = spi_flash_cmd(flash->spi, CMD_SST_EWSR, NULL, 0);
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if (ret)
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printk(BIOS_WARNING, "SF: Enabling Write Status failed\n");
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return ret;
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}
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static int
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sst_disable_writing(struct spi_flash *flash)
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{
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@ -212,7 +222,7 @@ sst_unlock(struct spi_flash *flash)
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int ret;
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u8 cmd, status;
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ret = sst_enable_writing(flash);
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ret = sst_enable_writing_status(flash);
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if (ret)
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return ret;
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