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cbmem: Add FSP timestamps 

Add additional FSP timestamp values to cbmem.h and specify values for
the existing ones.  Update cbmem.c with the FSP timestamp values and
descriptions.

BRANCH=none
BUG=None
TEST=Build for Braswell and Skylake boards using FSP 1.1.

Change-Id: I835bb090ff5877a108e48cb60f8e80260773771b
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10025
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Lee Leahy 2015-02-24 11:30:38 -08:00 committed by Leroy P Leahy
parent bdd98254ab
commit b8179087af
2 changed files with 26 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/include/timestamp.h
View File

@ -51,16 +51,12 @@ enum timestamp_id {
TS_START_ULZMA = 15, TS_START_ULZMA = 15,
TS_END_ULZMA = 16, TS_END_ULZMA = 16,
TS_DEVICE_ENUMERATE = 30, TS_DEVICE_ENUMERATE = 30,
TS_FSP_BEFORE_ENUMERATE,
TS_FSP_AFTER_ENUMERATE,
TS_DEVICE_CONFIGURE = 40, TS_DEVICE_CONFIGURE = 40,
TS_DEVICE_ENABLE = 50, TS_DEVICE_ENABLE = 50,
TS_DEVICE_INITIALIZE = 60, TS_DEVICE_INITIALIZE = 60,
TS_DEVICE_DONE = 70, TS_DEVICE_DONE = 70,
TS_CBMEM_POST = 75, TS_CBMEM_POST = 75,
TS_WRITE_TABLES = 80, TS_WRITE_TABLES = 80,
TS_FSP_BEFORE_FINALIZE,
TS_FSP_AFTER_FINALIZE,
TS_LOAD_PAYLOAD = 90, TS_LOAD_PAYLOAD = 90,
TS_ACPI_WAKE_JUMP = 98, TS_ACPI_WAKE_JUMP = 98,
TS_SELFBOOT_JUMP = 99, TS_SELFBOOT_JUMP = 99,
@ -77,6 +73,18 @@ enum timestamp_id {
TS_DONE_HASHING = 509, TS_DONE_HASHING = 509,
TS_END_HASH_BODY = 510, TS_END_HASH_BODY = 510,
/* 950+ reserved for vendorcode extensions (950-999: intel/fsp) */
TS_FSP_MEMORY_INIT_START = 950,
TS_FSP_MEMORY_INIT_END = 951,
TS_FSP_TEMP_RAM_EXIT_START = 952,
TS_FSP_TEMP_RAM_EXIT_END = 953,
TS_FSP_SILICON_INIT_START = 954,
TS_FSP_SILICON_INIT_END = 955,
TS_FSP_BEFORE_ENUMERATE = 956,
TS_FSP_AFTER_ENUMERATE = 957,
TS_FSP_BEFORE_FINALIZE = 958,
TS_FSP_AFTER_FINALIZE = 959,
/* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */ /* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */
}; };

15
util/cbmem/cbmem.c
View File

@ -413,7 +413,20 @@ static const struct timestamp_id_to_name {
{ TS_RW_VB_SELECT_AND_LOAD_KERNEL, "RW vboot select&load kernel" }, { TS_RW_VB_SELECT_AND_LOAD_KERNEL, "RW vboot select&load kernel" },
{ TS_VB_SELECT_AND_LOAD_KERNEL, "vboot select&load kernel" }, { TS_VB_SELECT_AND_LOAD_KERNEL, "vboot select&load kernel" },
{ TS_CROSSYSTEM_DATA, "crossystem data" }, { TS_CROSSYSTEM_DATA, "crossystem data" },
{ TS_START_KERNEL, "start kernel" } { TS_START_KERNEL, "start kernel" },
/* FSP related timestamps */
{ TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" },
{ TS_FSP_MEMORY_INIT_END, "returning from FspMemoryInit" },
{ TS_FSP_TEMP_RAM_EXIT_START, "calling FspTempRamExit" },
{ TS_FSP_TEMP_RAM_EXIT_END, "returning from FspTempRamExit" },
{ TS_FSP_SILICON_INIT_START, "calling FspSiliconInit" },
{ TS_FSP_SILICON_INIT_END, "returning from FspSiliconInit" },
{ TS_FSP_BEFORE_ENUMERATE, "calling FspNotify(AfterPciEnumeration)" },
{ TS_FSP_AFTER_ENUMERATE,
"returning from FspNotify(AfterPciEnumeration)" },
{ TS_FSP_BEFORE_FINALIZE, "calling FspNotify(ReadyToBoot)" },
{ TS_FSP_AFTER_FINALIZE, "returning from FspNotify(ReadyToBoot)" }
}; };
void timestamp_print_entry(uint32_t id, uint64_t stamp, uint64_t prev_stamp) void timestamp_print_entry(uint32_t id, uint64_t stamp, uint64_t prev_stamp)