GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

arch/x86: Make X86 stages select ARCH_X86 

Also, don't define the default as this results in spurious lines in the
.config.

TEST: Build all boards with where config.h differed with
BUILD_TIMELESS=1 and remained the same

Change-Id: Ic77b696f493d7648f317f0ba0a27fdee5212961e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31316
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2019-02-10 17:00:56 +01:00 committed by Patrick Georgi
parent 80759b0dbd
commit b86e96ab8c
17 changed files with 10 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
src/arch/x86/Kconfig
View File

@ -13,7 +13,6 @@
config ARCH_X86
bool
default n
select PCI
select RELOCATABLE_MODULES
@ -21,17 +20,16 @@ config ARCH_X86
config ARCH_BOOTBLOCK_X86_32
bool
default n
select ARCH_X86
select BOOTBLOCK_CUSTOM if ROMCC_BOOTBLOCK
config ARCH_VERSTAGE_X86_32
bool
default n
select ARCH_X86
config ARCH_ROMSTAGE_X86_32
bool
default n
select ARCH_X86
config ARCH_POSTCAR_X86_32
bool
@ -39,23 +37,22 @@ config ARCH_POSTCAR_X86_32
config ARCH_RAMSTAGE_X86_32
bool
default n
select ARCH_X86
# stage selectors for x64
config ARCH_BOOTBLOCK_X86_64
bool
default n
select ARCH_X86
select BOOTBLOCK_CUSTOM if ROMCC_BOOTBLOCK
config ARCH_VERSTAGE_X86_64
bool
default n
select ARCH_X86
config ARCH_ROMSTAGE_X86_64
bool
default n
select ARCH_X86
config ARCH_POSTCAR_X86_64
bool
@ -63,7 +60,9 @@ config ARCH_POSTCAR_X86_64
config ARCH_RAMSTAGE_X86_64
bool
default n
select ARCH_X86
if ARCH_X86
config ARCH_X86_64_PGTBL_LOC
hex "x86_64 page table location in CBFS"
@ -350,3 +349,5 @@ config MAX_PIRQ_LINKS
also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
table specifies links greater than 4, pirq_route_irqs will not
function properly, unless this variable is correctly set.
endif

1
src/mainboard/apple/macbook21/Kconfig
View File

@ -3,7 +3,6 @@ if BOARD_APPLE_MACBOOK11 || BOARD_APPLE_MACBOOK21 || BOARD_APPLE_IMAC52
config BOARD_SPECIFIC_OPTIONS
def_bool y
select SYSTEM_TYPE_LAPTOP
select ARCH_X86
select CPU_INTEL_SOCKET_M
select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GM

1
src/mainboard/asrock/g41c-gs/Kconfig
View File

@ -20,7 +20,6 @@ if BOARD_ASROCK_G41C_GS || BOARD_ASROCK_G41C_GS_R2_0 || \
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_X4X
select SOUTHBRIDGE_INTEL_I82801GX

1
src/mainboard/asus/p5gc-mx/Kconfig
View File

@ -17,7 +17,6 @@ if BOARD_ASUS_P5GC_MX
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GC

1
src/mainboard/asus/p5qc/Kconfig
View File

@ -18,7 +18,6 @@ if BOARD_ASUS_P5QC || BOARD_ASUS_P5Q_PRO || BOARD_ASUS_P5QL_PRO
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_X4X
select SOUTHBRIDGE_INTEL_I82801JX

1
src/mainboard/asus/p5qpl-am/Kconfig
View File

@ -18,7 +18,6 @@ if BOARD_ASUS_P5QPL_AM || BOARD_ASUS_P5G41T_M_LX
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_X4X
select SOUTHBRIDGE_INTEL_I82801GX

1
src/mainboard/asus/p8h61-m_pro/Kconfig
View File

@ -17,7 +17,6 @@ if BOARD_ASUS_P8H61_M_PRO
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select BOARD_ROMSIZE_KB_4096
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES

1
src/mainboard/foxconn/g41s-k/Kconfig
View File

@ -18,7 +18,6 @@ if BOARD_FOXCONN_G41S_K || BOARD_FOXCONN_G41M
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_X4X
select SOUTHBRIDGE_INTEL_I82801GX

1
src/mainboard/gigabyte/ga-945gcm-s2l/Kconfig
View File

@ -17,7 +17,6 @@ if BOARD_GIGABYTE_GA_945GCM_S2L || BOARD_GIGABYTE_GA_945GCM_S2C
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GC

1
src/mainboard/gigabyte/ga-b75m-d3h/Kconfig
View File

@ -2,7 +2,6 @@ if BOARD_GIGABYTE_GA_B75M_D3H || BOARD_GIGABYTE_GA_B75M_D3V || BOARD_GIGABYTE_GA
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select USE_NATIVE_RAMINIT
select SOUTHBRIDGE_INTEL_C216

1
src/mainboard/gigabyte/ga-g41m-es2l/Kconfig
View File

@ -17,7 +17,6 @@ if BOARD_GIGABYTE_GA_G41M_ES2L
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_X4X
select SOUTHBRIDGE_INTEL_I82801GX

1
src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig
View File

@ -17,7 +17,6 @@ if BOARD_GIGABYTE_GA_H61M_S2PV || BOARD_GIGABYTE_GA_H61MA_D3V
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select BOARD_ROMSIZE_KB_4096
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES

1
src/mainboard/intel/dg41wv/Kconfig
View File

@ -18,7 +18,6 @@ if BOARD_INTEL_DG41WV
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_X4X
select SOUTHBRIDGE_INTEL_I82801GX

1
src/mainboard/intel/dg43gt/Kconfig
View File

@ -18,7 +18,6 @@ if BOARD_INTEL_DG43GT
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_X4X
select SOUTHBRIDGE_INTEL_I82801JX

1
src/mainboard/lenovo/thinkcentre_a58/Kconfig
View File

@ -18,7 +18,6 @@ if BOARD_LENOVO_THINKCENTRE_A58
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_X4X
select SOUTHBRIDGE_INTEL_I82801GX

1
src/mainboard/msi/ms7707/Kconfig
View File

@ -2,7 +2,6 @@ if BOARD_MSI_MS7707
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select USE_NATIVE_RAMINIT
select SOUTHBRIDGE_INTEL_BD82X6X

1
src/mainboard/sapphire/pureplatinumh61/Kconfig
View File

@ -2,7 +2,6 @@ if BOARD_SAPPHIRE_PUREPLATINUMH61
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select USE_NATIVE_RAMINIT
select SOUTHBRIDGE_INTEL_BD82X6X