google/caroline: Change debounce time for jack insertion and ejection
Adapted from chromium commit 7633daa [caroline: Change debounce time for jack insertion and ejection] We are using max debounce time. During this time line, MICBIAS will be zero because of jack chasis. At the moment we got 0 button (PLAY/PAUSE) We need to reduce this time to below 100ms for caroline device. BUG=b:79559096 TEST=see there is no more irq before jack insertion/ejection irq complete Original-Change-Id: Ib6abdb4ff041823ca89f74cf59e2bfa644bb0d6a Original-Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com> Original-Reviewed-on: https://chromium-review.googlesource.com/1143109 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Wonjoon Lee <woojoo.lee@samsung.com> Change-Id: I8f605989d6ffc8a75127ed6722e7a37db95029ed Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27659 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -244,8 +244,8 @@ chip soc/intel/skylake
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register "sar_compare_time" = "0" # 500ns
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register "sar_compare_time" = "0" # 500ns
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register "sar_sampling_time" = "0" # 2us
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register "sar_sampling_time" = "0" # 2us
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register "short_key_debounce" = "2" # 100ms
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register "short_key_debounce" = "2" # 100ms
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register "jack_insert_debounce" = "7" # 512ms
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register "jack_insert_debounce" = "4" # 64ms
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register "jack_eject_debounce" = "7" # 512ms
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register "jack_eject_debounce" = "4" # 64ms
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device i2c 1a on end
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device i2c 1a on end
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end
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end
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chip drivers/i2c/generic
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chip drivers/i2c/generic
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