soc/intel/elkhartlake: Fix EHL mainboard build fail errors

When EHL initial mainboard patch is uploaded, there are some build
errors caused by EHL soc codes. Here are the fixes:
1. include gpio_op.asl to resolve undefined variables in scs.asl
2. remove unused variables in fsp_params.c
3. rearrage sequences of #includes to fix build dependency of
   soc/gpio_defs.h in intelblocks/gpio.h
4. add the __weak to mainboard_memory_init_params function
5. add the missing _len as per this patch changes
   https://review.coreboot.org/c/coreboot/+/45873

Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: Idaa8b0b5301742287665abde065ad72965bc62b3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47804
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tan, Lean Sheng 2020-11-20 03:06:26 -08:00 committed by Patrick Georgi
parent 40dc53a1a1
commit b89ce115da
5 changed files with 4 additions and 7 deletions

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@ -3,6 +3,7 @@
#include <intelblocks/gpio.h> #include <intelblocks/gpio.h>
#include <soc/gpio_defs.h> #include <soc/gpio_defs.h>
#include <soc/intel/common/acpi/gpio.asl> #include <soc/intel/common/acpi/gpio.asl>
#include <soc/intel/common/block/acpi/acpi/gpio_op.asl>
#include <soc/irq.h> #include <soc/irq.h>
#include <soc/pcr_ids.h> #include <soc/pcr_ids.h>

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@ -44,17 +44,13 @@ static const pci_devfn_t serial_io_dev[] = {
static void parse_devicetree(FSP_S_CONFIG *params) static void parse_devicetree(FSP_S_CONFIG *params)
{ {
const struct soc_intel_elkhartlake_config *config = config_of_soc();
/* TODO: Update with UPD override as FSP matures */ /* TODO: Update with UPD override as FSP matures */
} }
/* UPD parameters to be initialized before SiliconInit */ /* UPD parameters to be initialized before SiliconInit */
void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
{ {
unsigned int i;
struct device *dev;
FSP_S_CONFIG *params = &supd->FspsConfig; FSP_S_CONFIG *params = &supd->FspsConfig;
struct soc_intel_elkhartlake_config *config = config_of_soc();
/* Parse device tree and fill in FSP UPDs */ /* Parse device tree and fill in FSP UPDs */
parse_devicetree(params); parse_devicetree(params);

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@ -3,8 +3,8 @@
#ifndef _SOC_ELKHARTLAKE_GPIO_H_ #ifndef _SOC_ELKHARTLAKE_GPIO_H_
#define _SOC_ELKHARTLAKE_GPIO_H_ #define _SOC_ELKHARTLAKE_GPIO_H_
#include <intelblocks/gpio.h>
#include <soc/gpio_defs.h> #include <soc/gpio_defs.h>
#include <intelblocks/gpio.h>
#define CROS_GPIO_NAME "INT34C8" #define CROS_GPIO_NAME "INT34C8"
#define CROS_GPIO_COMM0_NAME "INT34C8:00" #define CROS_GPIO_COMM0_NAME "INT34C8:00"

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@ -25,7 +25,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mainboard_memory_init_params(mupd); mainboard_memory_init_params(mupd);
} }
void mainboard_memory_init_params(FSPM_UPD *mupd) __weak void mainboard_memory_init_params(FSPM_UPD *mupd)
{ {
/* TODO: Update later together with UPD updates */ /* TODO: Update later together with UPD updates */
} }

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@ -62,7 +62,7 @@ static void save_dimm_info(void)
/* Allow mainboard to override DRAM part number. */ /* Allow mainboard to override DRAM part number. */
dram_part_num = mainboard_get_dram_part_num(); dram_part_num = mainboard_get_dram_part_num();
if (dram_part_num) { if (dram_part_num) {
dram_part_num = strlen(dram_part_num); dram_part_num_len = strlen(dram_part_num);
is_dram_part_overridden = true; is_dram_part_overridden = true;
} }