sb/intel/common: Make linking pmbase.c conditional
Change-Id: I6a7cd96699dbeb42a53bf1d25db1bcf93e416e0f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33200 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -30,6 +30,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_SPI
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select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select IOAPIC
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_SMI_HANDLER
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@ -9,6 +9,11 @@ config SOUTHBRIDGE_INTEL_COMMON_RESET
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config SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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def_bool n
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depends on SOUTHBRIDGE_INTEL_COMMON
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depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
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config SOUTHBRIDGE_INTEL_COMMON_PMBASE
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def_bool n
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depends on SOUTHBRIDGE_INTEL_COMMON
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config SOUTHBRIDGE_INTEL_COMMON_GPIO
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def_bool n
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@ -36,6 +41,7 @@ config SOUTHBRIDGE_INTEL_COMMON_SMM
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def_bool n
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select HAVE_POWER_STATE_AFTER_FAILURE
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select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
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bool
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@ -78,6 +84,7 @@ config INTEL_CHIPSET_LOCKDOWN
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config SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
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bool
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depends on SOUTHBRIDGE_INTEL_COMMON
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depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
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if SOUTHBRIDGE_INTEL_COMMON_FINALIZE
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@ -27,8 +27,8 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c
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ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)
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all-y += pmbase.c
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smm-y += pmbase.c
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all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
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smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
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bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
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romstage-$(CONFIG_USBDEBUG) += usb_debug.c
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@ -32,6 +32,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
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select SOUTHBRIDGE_INTEL_COMMON
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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config EHCI_BAR
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hex
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@ -26,6 +26,7 @@ config SOUTHBRIDGE_INTEL_I82801GX
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_SPI
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select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select HAVE_INTEL_CHIPSET_LOCKDOWN
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select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
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select INTEL_HAS_TOP_SWAP
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@ -20,6 +20,7 @@ config SOUTHBRIDGE_INTEL_I82801IX
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_SPI if !BOARD_EMULATION_QEMU_X86_Q35
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select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select IOAPIC
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select HAVE_USBDEBUG
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select USE_WATCHDOG_ON_BOOT
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@ -21,6 +21,7 @@ config SOUTHBRIDGE_INTEL_I82801JX
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select SOUTHBRIDGE_INTEL_COMMON_SPI
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select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
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select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select IOAPIC
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select HAVE_USBDEBUG
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select USE_WATCHDOG_ON_BOOT
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@ -34,6 +34,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
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select SOUTHBRIDGE_INTEL_COMMON_SPI
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select SOUTHBRIDGE_INTEL_COMMON_SMM
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select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select HAVE_USBDEBUG_OPTIONS
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select COMMON_FADT
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select ACPI_SATA_GENERATOR
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@ -27,6 +27,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
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select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
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select SOUTHBRIDGE_INTEL_COMMON_FINALIZE
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select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select IOAPIC
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select HAVE_SMI_HANDLER
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select HAVE_USBDEBUG_OPTIONS
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