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mb/google/voteer: Enable DevSlp for SATA port1 

BUG=b:152893285
BRANCH=none
TEST=Build and boot to OS volteer with Intel SATA and reboot
from OS console

Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: Ibed8f8c445bf2ac2290ffb670d8dfb83fc960438
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40584
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Wonkyu Kim 2020-04-21 17:07:57 -07:00 committed by Duncan Laurie
parent 4cea00a64f
commit b8bfe142c6
1 changed files with 1 additions and 0 deletions
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1
src/mainboard/google/volteer/variants/baseboard/devicetree.cb
View File

@ -77,6 +77,7 @@ chip soc/intel/tigerlake
register "SataPortsEnable[0]" = "0"
register "SataPortsEnable[1]" = "1"
register "SataPortsDevSlp[0]" = "0"
register "SataPortsDevSlp[1]" = "1"
register "SerialIoI2cMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,