ryu: initialize LTE modem
BUG=chrome-os-partner:30748 TEST=Verify that LTE modem appears on USB during kernel boots on Ryu. Change-Id: I5b73a632ab827abe9c064a097e04d2c9030f9b46 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 070538e60b384d17e17ba3544881ef642c3f33ba Original-Change-Id: I8ec1f94c9aec5b4895a01cdfd3b86f88cd6bb877 Original-Signed-off-by: Ben Chan <benchan@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/214020 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9002 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -32,7 +32,7 @@ bootblock-y += pmic.c
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bootblock-y += reset.c
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bootblock-y += reset.c
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romstage-y += chromeos.c
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romstage-y += chromeos.c
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romstage-y += reset.c
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romstage-y += pmic.c
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romstage-y += reset.c
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romstage-y += reset.c
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romstage-y += romstage.c
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romstage-y += romstage.c
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romstage-y += sdram_configs.c
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romstage-y += sdram_configs.c
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@ -0,0 +1,32 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
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#define __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
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#include <soc/nvidia/tegra132/gpio.h>
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/* LTE modem related GPIOs */
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enum {
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MODEM_RESET = GPIO(S3),
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MODEM_PWR_ON = GPIO(S4),
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MDM_DET = GPIO(V1),
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};
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#endif /* __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__ */
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@ -45,7 +45,7 @@ static struct ti65913_init_reg init_list[] = {
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//etc.
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//etc.
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};
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};
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static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay)
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void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay)
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{
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{
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if (i2c_writeb(bus, TI65913_I2C_ADDR, reg, val)) {
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if (i2c_writeb(bus, TI65913_I2C_ADDR, reg, val)) {
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printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
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printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
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@ -20,6 +20,8 @@
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#ifndef __MAINBOARD_GOOGLE_RUSH_RYU_PMIC_H__
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#ifndef __MAINBOARD_GOOGLE_RUSH_RYU_PMIC_H__
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#define __MAINBOARD_GOOGLE_RUSH_RYU_PMIC_H__
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#define __MAINBOARD_GOOGLE_RUSH_RYU_PMIC_H__
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#include <stdint.h>
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/* A44/Ryu has a TI 65913 PMIC */
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/* A44/Ryu has a TI 65913 PMIC */
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enum {
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enum {
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TI65913_SMPS12_CTRL = 0x20,
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TI65913_SMPS12_CTRL = 0x20,
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@ -84,8 +86,13 @@ enum {
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TI65913_LDO_SHORT_STATUS1 = 0x6D,
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TI65913_LDO_SHORT_STATUS1 = 0x6D,
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TI65913_LDO_SHORT_STATUS2 = 0x6E,
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TI65913_LDO_SHORT_STATUS2 = 0x6E,
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TI65913_CLK32KGAUDIO_CTRL = 0xD5,
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TI65913_PRIMARY_SECONDARY_PAD2 = 0xFB,
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};
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};
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void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay);
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void pmic_init(unsigned bus);
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void pmic_init(unsigned bus);
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#endif /* __MAINBOARD_GOOGLE_RUSH_RYU_PMIC_H__ */
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#endif /* __MAINBOARD_GOOGLE_RUSH_RYU_PMIC_H__ */
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@ -17,6 +17,7 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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*/
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#include <delay.h>
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#include <soc/addressmap.h>
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#include <soc/addressmap.h>
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#include <soc/clock.h>
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#include <soc/clock.h>
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#include <soc/funitcfg.h>
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#include <soc/funitcfg.h>
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@ -24,11 +25,20 @@
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#include <soc/nvidia/tegra/i2c.h>
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#include <soc/nvidia/tegra/i2c.h>
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#include <soc/romstage.h>
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#include <soc/romstage.h>
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#include "gpio.h"
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#include "pmic.h"
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static const struct pad_config padcfgs[] = {
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static const struct pad_config padcfgs[] = {
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/* AP_SYS_RESET_L */
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/* AP_SYS_RESET_L */
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PAD_CFG_GPIO_OUT1(GPIO_PI5, PINMUX_PULL_UP),
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PAD_CFG_GPIO_OUT1(GPIO_PI5, PINMUX_PULL_UP),
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/* WP_L */
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/* WP_L */
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PAD_CFG_GPIO_INPUT(KB_ROW1, PINMUX_PULL_NONE),
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PAD_CFG_GPIO_INPUT(KB_ROW1, PINMUX_PULL_NONE),
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/* MODEM_RESET */
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PAD_CFG_GPIO_OUT0(KB_ROW11, PINMUX_PULL_DOWN),
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/* MODEM_PWR_ON */
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PAD_CFG_GPIO_OUT0(KB_ROW12, PINMUX_PULL_DOWN),
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/* MDM_DET - expected to be pulled down by LTE modem */
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PAD_CFG_GPIO_INPUT(GPIO_PV1, PINMUX_PULL_UP),
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};
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};
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static const struct pad_config tpm_pads[] = {
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static const struct pad_config tpm_pads[] = {
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@ -50,6 +60,32 @@ static const struct funit_cfg funits[] = {
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FUNIT_CFG(I2C6, PLLP, 400, NULL, 0),
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FUNIT_CFG(I2C6, PLLP, 400, NULL, 0),
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};
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};
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static void lte_modem_init(void)
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{
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int mdm_det;
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/* A LTE modem is present if MDM_DET is pulled down by the modem */
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mdm_det = gpio_get_in_value(MDM_DET);
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if (mdm_det == 1)
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return;
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printk(BIOS_DEBUG, "Found LTE modem\n");
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/* Enable PMIC CLK32KGAUDIO to drive CLK_MDM_32K */
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pmic_write_reg(I2CPWR_BUS, TI65913_PRIMARY_SECONDARY_PAD2, 0x02, 0);
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pmic_write_reg(I2CPWR_BUS, TI65913_CLK32KGAUDIO_CTRL, 0x01, 0);
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/* FULL_CARD_POWER_OFF# (A44: MODEM_PWR_ON) and RESET#
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* (A44: MODEM_RESET) of the LTE modem are actively low and initially
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* pulled down by the pad config. To properly enable the LTE modem,
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* de-assert FULL_CARD_POWER_OFF#, wait for at least 10ms, and then
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* de-assert RESET#.
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*/
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gpio_output(MODEM_PWR_ON, 1);
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udelay(15000);
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gpio_output(MODEM_RESET, 1);
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}
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void romstage_mainboard_init(void)
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void romstage_mainboard_init(void)
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{
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{
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/* Bring up controller interfaces for ramstage loading. */
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/* Bring up controller interfaces for ramstage loading. */
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@ -63,6 +99,8 @@ void romstage_mainboard_init(void)
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i2c_init(I2C2_BUS);
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i2c_init(I2C2_BUS);
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/* I2C6 bus (audio, etc.) */
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/* I2C6 bus (audio, etc.) */
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i2c_init(I2C6_BUS);
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i2c_init(I2C6_BUS);
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lte_modem_init();
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}
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}
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void mainboard_configure_pmc(void)
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void mainboard_configure_pmc(void)
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