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arch/riscv: Change all eret instructions to .word 0x30200073 (mret) 

Using the opcode directly is necessary for the transition to the GCC
6.1.0 based toolchain, because the old toolchain only supports eret and
the new toolchain only supports mret.

Change-Id: I17e14d4793ae5259f7ce3ce0211cbb27305506cc
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15290
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Jonathan Neuschäfer 2016-07-18 17:56:59 +02:00 committed by Ronald G. Minnich
parent 5d687add85
commit b8e67acc91
1 changed files with 4 additions and 2 deletions
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6
src/arch/riscv/trap_util.S
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@ -124,9 +124,11 @@ trap_entry:
supervisor_call_return: supervisor_call_return:
csrr a0, mscratch csrr a0, mscratch
restore_regs restore_regs
eret # go back into supervisor call # go back into supervisor call
.word 0x30200073 # mret
.global machine_call_return .global machine_call_return
machine_call_return: machine_call_return:
csrr a0, mscratch csrr a0, mscratch
restore_regs restore_regs
eret # go back into machine call # go back into machine call
.word 0x30200073 # mret