superio/ite/it8712f: Depreciate model specific early_serial.c

We now have common ite_*_*() functions for romstage and hence no longer
require the model specific portion of this superio support.

Change-Id: I30400abf27008a88072673075bba445f100d9ad3
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5838
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
This commit is contained in:
Edward O'Callaghan 2014-05-24 09:18:26 +10:00 committed by Idwer Vollering
parent 9bea0c1d14
commit b918623f2e
4 changed files with 0 additions and 80 deletions

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@ -30,7 +30,6 @@
#include "lib/delay.c"
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
#include "superio/ite/it8712f/early_serial.c"
#include <spd.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"

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@ -18,5 +18,4 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
romstage-$(CONFIG_SUPERIO_ITE_IT8712F) += early_serial.c
ramstage-$(CONFIG_SUPERIO_ITE_IT8712F) += superio.c

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@ -1,76 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/pnp.h>
#include <stdint.h>
#include "it8712f.h"
/* The base address is 0x2e or 0x4e, depending on config bytes. */
#define SIO_BASE 0x2e
#define SIO_INDEX SIO_BASE
#define SIO_DATA (SIO_BASE + 1)
/* Global configuration registers. */
#define IT8712F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
#define IT8712F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
#define IT8712F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */
#define IT8712F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */
#define IT8712F_CONFIG_REG_MFC 0x2a /* Multi-function control */
#define IT8712F_CONFIG_REG_WATCHDOG 0x72 /* Watchdog control. */
static void it8712f_sio_write(u8 ldn, u8 index, u8 value)
{
outb(IT8712F_CONFIG_REG_LDN, SIO_BASE);
outb(ldn, SIO_DATA);
outb(index, SIO_BASE);
outb(value, SIO_DATA);
}
static void it8712f_enter_conf(void)
{
u16 port = 0x2e; /* TODO: Don't hardcode! */
outb(0x87, port);
outb(0x01, port);
outb(0x55, port);
outb((port == 0x4e) ? 0xaa : 0x55, port);
}
static void it8712f_exit_conf(void)
{
it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02);
}
/*
* We need to set enable 3VSBSW#, this was documented only in IT8712F_V0.9.2!
*
* LDN 7, reg 0x2a - needed for S3, or memory power will be cut off.
*
* Enable 3VSBSW#. (For System Suspend-to-RAM)
* 0: 3VSBSW# will be always inactive.
* 1: 3VSBSW# enabled. It will be (NOT SUSB#) NAND SUSC#.
*/
void it8712f_enable_3vsbsw(void)
{
it8712f_enter_conf();
it8712f_sio_write(IT8712F_GPIO, IT8712F_CONFIG_REG_MFC, 0x80);
it8712f_exit_conf();
}

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@ -35,6 +35,4 @@
#define IT8712F_GAME 0x09 /* GAME port */
#define IT8712F_IR 0x0a /* Consumer IR */
void it8712f_enable_3vsbsw(void);
#endif /* SUPERIO_ITE_IT8712F_H */