Rename cache_lbmem() to cache_ramstage()

... and don't require it to specify a cache type.
This function is only used on romcc boards, and should go away
(because all boards should be switched to CAR)

Change-Id: Ic32ca3be1afffc773c72c140e88b338d48a0c8ca
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1288
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

src/cpu/x86/mtrr/earlymtrr.c

@@ -21,11 +21,11 @@ static void set_var_mtrr(
 }
 
 #if !defined(CONFIG_CACHE_AS_RAM) || !CONFIG_CACHE_AS_RAM
-static void cache_lbmem(int type)
+static void cache_ramstage(void)
 {
-	/* Enable caching for 0 - 1MB using variable mtrr */
+	/* Enable caching for lower 1MB and ram stage using variable mtrr */
 	disable_cache();
-	set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, type);
+	set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK);
 	enable_cache();
 }
 

src/northbridge/intel/e7520/raminit.c

@@ -1334,5 +1334,5 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	pci_write_config16(PCI_DEV(0, 0x00, 0), MCHSCRB, data16);
 
 	/* The memory is now setup, use it */
-	cache_lbmem(MTRR_TYPE_WRBACK);
+	cache_ramstage();
 }

src/northbridge/intel/e7525/raminit.c

@@ -1307,5 +1307,5 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	pci_write_config16(ctrl->f0, MCHSCRB, data16);
 
 	/* The memory is now setup, use it */
-	cache_lbmem(MTRR_TYPE_WRBACK);
+	cache_ramstage();
 }

src/northbridge/intel/i3100/raminit.c

@@ -1198,6 +1198,6 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
 	/* The memory is now setup, use it */
 #if !CONFIG_CACHE_AS_RAM
-	cache_lbmem(MTRR_TYPE_WRBACK);
+	cache_ramstage();
 #endif
 }

src/northbridge/intel/i3100/raminit_ep80579.c

@@ -772,7 +772,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	pci_write_config32(ctrl->f0, DRC, drc);
 
 	/* The memory is now set up--use it */
-	cache_lbmem(MTRR_TYPE_WRBACK);
+	cache_ramstage();
 }
 
 static inline int memory_initialized(void)