mb/google/brask/var/kuldax: add fw_config and enable BT offload

add fw_config probe for auido and enable BT offload support.

BUG=b:232419816 b:232419765
TEST=FW_NAME=kuldax emerge-brask coreboot

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: Id58e48cc2510d0377040d86bb9dbbb45bec7d624
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64987
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
This commit is contained in:
David Wu 2022-06-06 16:41:31 +08:00 committed by Felix Held
parent 7524c8dae5
commit b95ebf9fcf
4 changed files with 98 additions and 1 deletions

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@ -4,3 +4,5 @@ bootblock-y += gpio.c
romstage-y += gpio.c romstage-y += gpio.c
ramstage-y += gpio.c ramstage-y += gpio.c
ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
ramstage-$(CONFIG_FW_CONFIG) += variant.c

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@ -0,0 +1,75 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h>
#include <console/console.h>
#include <fw_config.h>
#include <gpio.h>
static const struct pad_config dmic_enable_pads[] = {
PAD_CFG_NF(GPP_R6, NONE, DEEP, NF3), /* DMIC_CLK1_R */
PAD_CFG_NF(GPP_R7, NONE, DEEP, NF3), /* DMIC_DATA1_R */
};
static const struct pad_config dmic_disable_pads[] = {
PAD_NC(GPP_R6, NONE),
PAD_NC(GPP_R7, NONE),
};
static const struct pad_config i2s_enable_pads[] = {
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2), /* I2S_HP_SCLK_R */
PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2), /* I2S_HP_SFRM_R */
PAD_CFG_NF(GPP_R2, DN_20K, DEEP, NF2), /* I2S_PCH_TX_HP_RX_STRAP */
PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2), /* I2S_PCH_RX_HP_TX */
};
static const struct pad_config i2s_disable_pads[] = {
PAD_NC(GPP_R0, NONE),
PAD_NC(GPP_R1, NONE),
PAD_NC(GPP_R2, NONE),
PAD_NC(GPP_R3, NONE),
};
static const struct pad_config bt_i2s_enable_pads[] = {
PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3), /* BT_I2S_BCLK */
PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF3), /* BT_I2S_SYNC */
PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF3), /* BT_I2S_SDO */
PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF3), /* BT_I2S_SDI */
PAD_CFG_NF(GPP_VGPIO_34, NONE, DEEP, NF1), /* SSP2_SCLK */
PAD_CFG_NF(GPP_VGPIO_35, NONE, DEEP, NF1), /* SSP2_SFRM */
PAD_CFG_NF(GPP_VGPIO_36, NONE, DEEP, NF1), /* SSP_TXD */
PAD_CFG_NF(GPP_VGPIO_37, NONE, DEEP, NF1), /* SSP_RXD */
};
static const struct pad_config bt_i2s_disable_pads[] = {
PAD_NC(GPP_VGPIO_30, NONE),
PAD_NC(GPP_VGPIO_31, NONE),
PAD_NC(GPP_VGPIO_32, NONE),
PAD_NC(GPP_VGPIO_33, NONE),
PAD_NC(GPP_VGPIO_34, NONE),
PAD_NC(GPP_VGPIO_35, NONE),
PAD_NC(GPP_VGPIO_36, NONE),
PAD_NC(GPP_VGPIO_37, NONE),
};
static void fw_config_handle(void *unused)
{
if (!fw_config_is_provisioned() || fw_config_probe(FW_CONFIG(AUDIO, AUDIO_UNKNOWN))) {
printk(BIOS_INFO, "Disable audio related GPIO pins.\n");
gpio_configure_pads(i2s_disable_pads, ARRAY_SIZE(i2s_disable_pads));
gpio_configure_pads(dmic_disable_pads, ARRAY_SIZE(dmic_disable_pads));
gpio_configure_pads(bt_i2s_disable_pads, ARRAY_SIZE(bt_i2s_disable_pads));
return;
}
if (fw_config_probe(FW_CONFIG(AUDIO, NAU88L25B_I2S))) {
printk(BIOS_INFO, "Configure audio over I2S with NAU88L25B.\n");
gpio_configure_pads(dmic_enable_pads, ARRAY_SIZE(dmic_enable_pads));
gpio_configure_pads(i2s_enable_pads, ARRAY_SIZE(i2s_enable_pads));
printk(BIOS_INFO, "BT offload enabled\n");
gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
} else {
printk(BIOS_INFO, "BT offload disabled\n");
gpio_configure_pads(bt_i2s_disable_pads, ARRAY_SIZE(bt_i2s_disable_pads));
}
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);

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@ -1,3 +1,10 @@
fw_config
field AUDIO 0 2
option AUDIO_UNKNOWN 0
option NAU88L25B_I2S 1
end
end
chip soc/intel/alderlake chip soc/intel/alderlake
register "serial_io_gspi_mode" = "{ register "serial_io_gspi_mode" = "{
[PchSerialIoIndexGSPI0] = PchSerialIoDisabled, [PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
@ -126,7 +133,9 @@ chip soc/intel/alderlake
register "short_key_debounce" = "2" # 100ms register "short_key_debounce" = "2" # 100ms
register "jack_insert_debounce" = "7" # 512ms register "jack_insert_debounce" = "7" # 512ms
register "jack_eject_debounce" = "7" # 512ms register "jack_eject_debounce" = "7" # 512ms
device i2c 1a on end device i2c 1a on
probe AUDIO NAU88L25B_I2S
end
end end
end end
device ref pcie_rp7 on device ref pcie_rp7 on

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@ -0,0 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <chip.h>
#include <fw_config.h>
#include <baseboard/variants.h>
void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{
config->cnvi_bt_audio_offload = fw_config_probe(FW_CONFIG(AUDIO,
NAU88L25B_I2S));
}