tegra132: convert to stopwatch API
Simplify the timed operations by using the stopwatch API. BUG=None BRANCH=None TEST=Built and booted to kernel. Analyzed logs. Output as expected. Change-Id: Ia49bccccc412f23bb620ed386b9174468a434116 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a877020c6d8ba12422c9c2c487122b7eb4a1967b Original-Change-Id: Iffc32fcb9b8bfdcfbef67f563ac3014912f82e7f Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/219494 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8831 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -38,9 +38,8 @@
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static int ccplex_start(void)
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static int ccplex_start(void)
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{
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{
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struct mono_time t1, t2;
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struct stopwatch sw;
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const long timeout_us = 1500000;
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const long timeout_ms = 1500;
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long wait_time;
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const uint32_t handshake_mask = 1;
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const uint32_t handshake_mask = 1;
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const uint32_t cxreset1_mask = 1 << 21;
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const uint32_t cxreset1_mask = 1 << 21;
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uint32_t reg;
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uint32_t reg;
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@ -55,24 +54,22 @@ static int ccplex_start(void)
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reg |= cxreset1_mask;
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reg |= cxreset1_mask;
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write32(reg, &clk_rst->rst_cpu_cmplx_set);
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write32(reg, &clk_rst->rst_cpu_cmplx_set);
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timer_monotonic_get(&t1);
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stopwatch_init_msecs_expire(&sw, timeout_ms);
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while (1) {
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while (1) {
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reg = read32(&pmc->scratch118);
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reg = read32(&pmc->scratch118);
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timer_monotonic_get(&t2);
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wait_time = mono_time_diff_microseconds(&t1, &t2);
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/* Wait for the bit to be knocked down. */
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/* Wait for the bit to be knocked down. */
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if ((reg & handshake_mask) != handshake_mask)
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if ((reg & handshake_mask) != handshake_mask)
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break;
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break;
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if (wait_time >= timeout_us) {
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if (stopwatch_expired(&sw)) {
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printk(BIOS_DEBUG, "MTS handshake timeout.\n");
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printk(BIOS_DEBUG, "MTS handshake timeout.\n");
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return -1;
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return -1;
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}
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}
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}
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}
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printk(BIOS_DEBUG, "MTS handshake took %ld us.\n", wait_time);
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printk(BIOS_DEBUG, "MTS handshake took %ld us.\n",
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stopwatch_duration_usecs(&sw));
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return 0;
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return 0;
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}
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}
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@ -140,7 +137,7 @@ static void request_ram_repair(void)
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const uint32_t req = 1 << 0;
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const uint32_t req = 1 << 0;
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const uint32_t sts = 1 << 1;
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const uint32_t sts = 1 << 1;
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uint32_t reg;
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uint32_t reg;
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struct mono_time t1, t2;
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struct stopwatch sw;
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printk(BIOS_DEBUG, "Requesting RAM repair.\n");
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printk(BIOS_DEBUG, "Requesting RAM repair.\n");
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@ -148,12 +145,12 @@ static void request_ram_repair(void)
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reg |= req;
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reg |= req;
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write32(reg, &flow->ram_repair);
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write32(reg, &flow->ram_repair);
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timer_monotonic_get(&t1);
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stopwatch_init(&sw);
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while ((read32(&flow->ram_repair) & sts) != sts);
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while ((read32(&flow->ram_repair) & sts) != sts)
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timer_monotonic_get(&t2);
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;
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printk(BIOS_DEBUG, "RAM repair complete in %ld usecs.\n",
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printk(BIOS_DEBUG, "RAM repair complete in %ld usecs.\n",
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mono_time_diff_microseconds(&t1, &t2));
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stopwatch_duration_usecs(&sw));
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}
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}
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void ccplex_cpu_prepare(void)
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void ccplex_cpu_prepare(void)
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@ -416,8 +416,7 @@ static inline u32 rx_fifo_count(struct tegra_spi_channel *spi)
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static int tegra_spi_pio_finish(struct tegra_spi_channel *spi)
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static int tegra_spi_pio_finish(struct tegra_spi_channel *spi)
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{
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{
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u8 *p = spi->in_buf;
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u8 *p = spi->in_buf;
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struct mono_time start;
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struct stopwatch sw;
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struct rela_time rt;
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clrbits_le32(&spi->regs->command1, SPI_CMD1_RX_EN | SPI_CMD1_TX_EN);
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clrbits_le32(&spi->regs->command1, SPI_CMD1_RX_EN | SPI_CMD1_TX_EN);
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@ -425,12 +424,11 @@ static int tegra_spi_pio_finish(struct tegra_spi_channel *spi)
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* Allow some time in case the Rx FIFO does not yet have
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* Allow some time in case the Rx FIFO does not yet have
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* all packets pushed into it. See chrome-os-partner:24215.
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* all packets pushed into it. See chrome-os-partner:24215.
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*/
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*/
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timer_monotonic_get(&start);
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stopwatch_init_usecs_expire(&sw, SPI_FIFO_XFER_TIMEOUT_US);
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do {
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do {
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if (rx_fifo_count(spi) == spi_byte_count(spi))
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if (rx_fifo_count(spi) == spi_byte_count(spi))
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break;
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break;
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rt = current_time_from(&start);
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} while (!stopwatch_expired(&sw));
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} while (rela_time_in_microseconds(&rt) < SPI_FIFO_XFER_TIMEOUT_US);
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while (!(read32(&spi->regs->fifo_status) &
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while (!(read32(&spi->regs->fifo_status) &
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SPI_FIFO_STATUS_RX_FIFO_EMPTY)) {
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SPI_FIFO_STATUS_RX_FIFO_EMPTY)) {
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@ -28,18 +28,18 @@ void init_timer(void)
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void udelay(unsigned usec)
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void udelay(unsigned usec)
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{
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{
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struct mono_time current, end;
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struct stopwatch sw;
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if (!thread_yield_microseconds(usec))
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return;
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/*
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/*
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* As the hardware clock granularity is in microseconds pad the
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* As the hardware clock granularity is in microseconds pad the
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* requested delay by one to get at least >= requested usec delay.
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* requested delay by one to get at least >= requested usec delay.
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*/
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*/
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timer_monotonic_get(&end);
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usec += 1;
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mono_time_add_usecs(&end, usec + 1);
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do {
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if (!thread_yield_microseconds(usec))
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timer_monotonic_get(¤t);
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return;
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} while (mono_time_before(¤t, &end));
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stopwatch_init_usecs_expire(&sw, usec);
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while (!stopwatch_expired(&sw))
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;
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}
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}
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