diff --git a/src/soc/amd/cezanne/fw.cfg b/src/soc/amd/cezanne/fw.cfg index 189bc9d0d6..277707de1c 100644 --- a/src/soc/amd/cezanne/fw.cfg +++ b/src/soc/amd/cezanne/fw.cfg @@ -29,6 +29,7 @@ KEYDBBL_FILE TypeId0x50_KeyDbBl_CZN.sbin KEYDB_TOS_FILE TypeId0x51_KeyDbTos_CZN.sbin DMCUERAMDCN21_FILE TypeId0x58_DmcuEramDcn21.sbin DMCUINTVECTORSDCN21_FILE TypeId0x59_DmcuIntvectorsDcn21.sbin +PSPBTLDR_AB_FILE TypeId0x73_PspBootLoader_AB_CZN.sbin # BDT PSP_PMUI_FILE1 TypeId0x64_Appb_CZN_1D_Lpddr4_Imem.csbin diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 8b54876db7..3d33d70453 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -261,6 +261,7 @@ amd_fw_entry amd_psp_fw_table[] = { { .type = AMD_FW_DMCU_ERAM, .level = PSP_LVL2 }, { .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 }, { .type = AMD_RPMC_NVRAM, .level = PSP_LVL2 }, + { .type = AMD_FW_PSP_BOOTLOADER_AB, .level = PSP_LVL2 }, { .type = AMD_ABL0, .level = PSP_BOTH }, { .type = AMD_ABL1, .level = PSP_BOTH }, { .type = AMD_ABL2, .level = PSP_BOTH }, diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index b12b989b74..c8e7ef4b93 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -47,6 +47,7 @@ typedef enum _amd_fw_type { AMD_RPMC_NVRAM = 0x54, AMD_FW_DMCU_ERAM = 0x58, AMD_FW_DMCU_ISR = 0x59, + AMD_FW_PSP_BOOTLOADER_AB = 0x73, AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */ AMD_FW_GEC, AMD_FW_XHCI, diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c index b6e14a8f9a..80d8d01aa7 100644 --- a/util/amdfwtool/data_parse.c +++ b/util/amdfwtool/data_parse.c @@ -244,6 +244,9 @@ static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename, } else if (strcmp(fw_name, "RPMC_FILE") == 0) { fw_type = AMD_RPMC_NVRAM; subprog = 0; + } else if (strcmp(fw_name, "PSPBTLDR_AB_FILE") == 0) { + fw_type = AMD_FW_PSP_BOOTLOADER_AB; + subprog = 0; } else { fw_type = AMD_FW_INVALID; /* TODO: Add more */