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mb/lenovo/haswell: Enable VBOOT_VBNV_FLASH 

To deprecate VBOOT_VBNV_CMOS [1], replace VBOOT_VBNV_CMOS with
VBOOT_VBNV_FLASH for Haswell.

Currently BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES is selected for
CPU_INTEL_HASWELL (see [2]). However, there seems to be no
particular reason on those platforms. Flashconsole works on Broadwell,
at least, and it writes to flash as early as bootblock. Therefore,
remove BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES, so that VBOOT_VBNV_FLASH
can be enabled.

[1] https://issuetracker.google.com/issues/235293589
[2] commit 6c2568f4f5 (CB:45740)
    drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config

BUG=b:235293589
TEST=./util/abuild/abuild -t LENOVO_THINKPAD_T440P -a (with VBOOT)

Change-Id: If1430ffd6115a0bc151cbe0632cda7fc5f6c26a6
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Yu-Ping Wu 2022-09-12 16:10:58 +08:00 committed by Arthur Heymans
parent 6526e78967
commit b9a9dcd8d6
3 changed files with 3 additions and 3 deletions
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1
src/cpu/intel/haswell/Kconfig
View File

@ -7,7 +7,6 @@ if CPU_INTEL_HASWELL
config CPU_SPECIFIC_OPTIONS config CPU_SPECIFIC_OPTIONS
def_bool y def_bool y
select ARCH_X86 select ARCH_X86
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select MMX select MMX
select SSE2 select SSE2
select UDELAY_TSC select UDELAY_TSC

2
src/mainboard/lenovo/haswell/Kconfig
View File

@ -35,7 +35,7 @@ config VBOOT
select GBB_FLAG_DISABLE_LID_SHUTDOWN select GBB_FLAG_DISABLE_LID_SHUTDOWN
select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
select HAS_RECOVERY_MRC_CACHE select HAS_RECOVERY_MRC_CACHE
select VBOOT_VBNV_CMOS select VBOOT_VBNV_FLASH
config VBOOT_SLOTS_RW_AB config VBOOT_SLOTS_RW_AB
default y default y

3
src/mainboard/lenovo/haswell/vboot-rwab.fmd
View File

@ -19,8 +19,9 @@ FLASH@0xff400000 0xc00000 {
RECOVERY_MRC_CACHE@0x0 0x10000 RECOVERY_MRC_CACHE@0x0 0x10000
RW_MRC_CACHE@0x10000 0x10000 RW_MRC_CACHE@0x10000 0x10000
} }
RW_NVRAM(PRESERVE) 0x2000
RW_VPD(PRESERVE) 0x1000 RW_VPD(PRESERVE) 0x1000
SMMSTORE(PRESERVE)@0x521000 0x40000 SMMSTORE(PRESERVE)@0x523000 0x40000
WP_RO { WP_RO {
FMAP 0x800 FMAP 0x800