northbridge/intel/haswell: Fix undefined behavior
Fix undefined behavior found by clang's -Wshift-sign-overflow, grep, and source inspection. Left shifting an int where the right operand is >= the width of the type is undefined. Add UL suffix since it's safe for unsigned types. Change-Id: Id1ed2252ce3ed052730dd10b24c453c34c2ab4ff Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com> Reviewed-on: https://review.coreboot.org/20465 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -29,6 +29,7 @@ unsigned long acpi_fill_mcfg(unsigned long current)
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u32 pciexbar = 0;
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u32 pciexbar_reg;
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int max_buses;
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u32 mask;
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dev = dev_find_slot(0, PCI_DEVFN(0, 0));
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if (!dev)
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@ -40,17 +41,20 @@ unsigned long acpi_fill_mcfg(unsigned long current)
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if (!(pciexbar_reg & (1 << 0)))
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return current;
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mask = (1UL << 31) | (1 << 30) | (1 << 29) | (1 << 28);
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switch ((pciexbar_reg >> 1) & 3) {
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case 0: // 256MB
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pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28));
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pciexbar = pciexbar_reg & mask;
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max_buses = 256;
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break;
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case 1: // 128M
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pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27));
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mask |= (1 << 27);
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pciexbar = pciexbar_reg & mask;
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max_buses = 128;
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break;
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case 2: // 64M
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pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)|(1 << 26));
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mask |= (1 << 27) | (1 << 26);
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pciexbar = pciexbar_reg & mask;
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max_buses = 64;
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break;
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default: // RSVD
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@ -81,7 +81,7 @@ static void haswell_setup_graphics(void)
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/* GPU RC6 workaround for sighting 366252 */
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reg32 = MCHBAR32(0x5d14);
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reg32 |= (1 << 31);
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reg32 |= (1UL << 31);
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MCHBAR32(0x5d14) = reg32;
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/* VLW */
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@ -35,11 +35,11 @@ void intel_northbridge_haswell_finalize_smm(void)
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pci_or_config32(PCI_DEV_HSW, 0xbc, 1 << 0); /* TOLUD */
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MCHBAR32_OR(0x5500, 1 << 0); /* PAVP */
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MCHBAR32_OR(0x5f00, 1 << 31); /* SA PM */
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MCHBAR32_OR(0x5f00, 1UL << 31); /* SA PM */
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MCHBAR32_OR(0x6020, 1 << 0); /* UMA GFX */
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MCHBAR32_OR(0x63fc, 1 << 0); /* VTDTRK */
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MCHBAR32_OR(0x6800, 1 << 31);
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MCHBAR32_OR(0x7000, 1 << 31);
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MCHBAR32_OR(0x6800, 1UL << 31);
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MCHBAR32_OR(0x7000, 1UL << 31);
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MCHBAR32_OR(0x77fc, 1 << 0);
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/* Memory Controller Lockdown */
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