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sb/intel/i82801gx: Select INTEL_TOP_SWAP_BOOTBLOCK_SIZE 

This effectively means it is possible to run another bootblock located at
top_of_flash - 64K.
The i82801gx southbridge has the ability to swap the two top 64K ranges by
flipping the BUC.TS bit (RCBA[3414] bit0).

This allows coreboot to build roms with a bootblock at the top swap offset by
selecting CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK.

Change-Id: Id96e10aea3e5fd955d45287134eb8643be414de9
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27748
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
This commit is contained in:
Arthur Heymans 2018-07-27 15:29:21 +02:00 committed by Patrick Georgi
parent 07bc3251a9
commit b9c049a368
1 changed files with 6 additions and 0 deletions
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6
src/southbridge/intel/i82801gx/Kconfig
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@ -28,6 +28,7 @@ config SOUTHBRIDGE_INTEL_I82801GX
select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_SPI
select HAVE_INTEL_CHIPSET_LOCKDOWN select HAVE_INTEL_CHIPSET_LOCKDOWN
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
select INTEL_HAS_TOP_SWAP
if SOUTHBRIDGE_INTEL_I82801GX if SOUTHBRIDGE_INTEL_I82801GX
@ -43,4 +44,9 @@ config HPET_MIN_TICKS
hex hex
default 0x80 default 0x80
config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
hex
# Always 64K, all other options are invalid
default 0x10000
endif endif