soc/intel/broadwell: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot paths move the rtc failure calculation to pmutil.c and add a helper function to determine if failure occurred. BUG=b:63054105 Change-Id: Ia0a38f00d2a5c7270e24bdd35ecab7fbba1016d4 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/21552 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -155,4 +155,7 @@ void disable_gpe(uint32_t mask);
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/* Return the selected ACPI SCI IRQ */
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/* Return the selected ACPI SCI IRQ */
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int acpi_sci_irq(void);
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int acpi_sci_irq(void);
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/* Return non-zero when RTC failure happened. */
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int rtc_failure(void);
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#endif
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#endif
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@ -180,18 +180,7 @@ static void pch_power_options(device_t dev)
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static void pch_rtc_init(struct device *dev)
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static void pch_rtc_init(struct device *dev)
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{
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{
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u8 reg8;
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cmos_init(rtc_failure());
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int rtc_failed;
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reg8 = pci_read_config8(dev, GEN_PMCON_3);
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rtc_failed = reg8 & RTC_BATTERY_DEAD;
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if (rtc_failed) {
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(dev, GEN_PMCON_3, reg8);
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printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed);
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}
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cmos_init(rtc_failed);
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}
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}
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static const struct reg_script pch_misc_init_script[] = {
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static const struct reg_script pch_misc_init_script[] = {
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@ -446,3 +446,20 @@ int acpi_sci_irq(void)
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printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
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printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
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return sci_irq;
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return sci_irq;
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}
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}
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int rtc_failure(void)
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{
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u8 reg8;
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int rtc_failed;
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device_t dev = PCH_DEV_LPC;
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reg8 = pci_read_config8(dev, GEN_PMCON_3);
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rtc_failed = reg8 & RTC_BATTERY_DEAD;
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if (rtc_failed) {
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reg8 &= ~RTC_BATTERY_DEAD;
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pci_write_config8(dev, GEN_PMCON_3, reg8);
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printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed);
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}
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return !!rtc_failed;
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}
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