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soc/intel/broadwell: refactor rtc failure checking 

In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to pmutil.c and add a helper
function to determine if failure occurred.

BUG=b:63054105

Change-Id: Ia0a38f00d2a5c7270e24bdd35ecab7fbba1016d4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21552
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Aaron Durbin 2017-09-15 11:51:58 -06:00
parent 3118b6277d
commit b9d9b79ced
3 changed files with 21 additions and 12 deletions
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3
src/soc/intel/broadwell/include/soc/pm.h
View File

@ -155,4 +155,7 @@ void disable_gpe(uint32_t mask);
/* Return the selected ACPI SCI IRQ */
int acpi_sci_irq(void);
/* Return non-zero when RTC failure happened. */
int rtc_failure(void);
#endif

13
src/soc/intel/broadwell/lpc.c
View File

@ -180,18 +180,7 @@ static void pch_power_options(device_t dev)
static void pch_rtc_init(struct device *dev)
{
u8 reg8;
int rtc_failed;
reg8 = pci_read_config8(dev, GEN_PMCON_3);
rtc_failed = reg8 & RTC_BATTERY_DEAD;
if (rtc_failed) {
reg8 &= ~RTC_BATTERY_DEAD;
pci_write_config8(dev, GEN_PMCON_3, reg8);
printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed);
}
cmos_init(rtc_failed);
cmos_init(rtc_failure());
}
static const struct reg_script pch_misc_init_script[] = {

17
src/soc/intel/broadwell/pmutil.c
View File

@ -446,3 +446,20 @@ int acpi_sci_irq(void)
printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
return sci_irq;
}
int rtc_failure(void)
{
u8 reg8;
int rtc_failed;
device_t dev = PCH_DEV_LPC;
reg8 = pci_read_config8(dev, GEN_PMCON_3);
rtc_failed = reg8 & RTC_BATTERY_DEAD;
if (rtc_failed) {
reg8 &= ~RTC_BATTERY_DEAD;
pci_write_config8(dev, GEN_PMCON_3, reg8);
printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed);
}
return !!rtc_failed;
}