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google/trogdor: Update the power on sequence of ps8640 

For the Qualcomm PBL configuration of GPIO, we need to initial the
GPIOs for VDD33# and RST# at the beginning of coreboot. According to
the pa8640 latest spec v1.4, update the sequence of VDD33# and PD#.

BUG=b:204637643
BRANCH=trogdor
TEST=verified the waveform of ps8640 at coreboot phase.

Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com>
Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58994
Reviewed-by: Wentao Qin <qinwentao@huaqin.corp-partner.google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
xuxinxiong 2021-11-06 16:11:30 +08:00 committed by Felix Held
parent a003c33aa1
commit ba2b1139f1
2 changed files with 12 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/trogdor/chromeos.c
View File

@ -22,6 +22,8 @@ void setup_chromeos_gpios(void)
} else {
gpio_output(GPIO_EN_PP3300_DX_EDP, 0);
gpio_output(GPIO_EDP_BRIDGE_ENABLE, 0);
gpio_output(GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE, 0);
gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 0);
}
if (CONFIG(TROGDOR_HAS_FINGERPRINT)) {

14
src/mainboard/google/trogdor/mainboard.c
View File

@ -106,12 +106,18 @@ static void power_on_ps8640_bridge(void)
gpio_output(GPIO_EN_PP3300_DX_EDP, 1);
gpio_output(GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE, 1);
gpio_output(GPIO_PS8640_EDP_BRIDGE_PD_L, 1);
gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 0);
/*
* According to ps8640 app note v0.6, wait for 2ms ("t1") after
* VDD33 goes high and then deassert RST.
* According to ps8640 v1.4 spec, and the raise time of vdd33 is a bit
* long, so wait for 4ms after VDD33 goes high and then deassert PD.
*/
mdelay(4);
gpio_output(GPIO_PS8640_EDP_BRIDGE_PD_L, 1);
/*
* According to ps8640 app note v0.6, wait for 2ms after VDD33 goes
* high and then deassert RST.
*/
mdelay(2);