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rockchip/rk3399 & gru/kevin: support sdram 933MHz on kevin 

We should be running faster.  Faster = better.

BRANCH=None
BUG=chrome-os-partner:54873
TEST=Boot; stressapptest -M 1028 -s 10000

Change-Id: I7f855960af3142efb71cf9c15edd1da66084e9d8
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 51bfd2abb1aba839bd0b5b85e9e918f3cc4fd94d
Original-Change-Id: Iec9343763c1a5a5344959b6e8c4dee8079cf8a20
Original-Signed-off-by: Lin Huang <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/362822
Original-Reviewed-by: Douglas Anderson <dianders@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16241
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Lin Huang 2016-07-25 10:06:09 +08:00 committed by Martin Roth
parent b18a6665df
commit ba2b63a20a
4 changed files with 1573 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/mainboard/google/gru/sdram_configs.c
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@ -35,6 +35,9 @@ static struct rk3399_sdram_params sdram_configs[] = {
/* 800MHz, disable odt */ /* 800MHz, disable odt */
#include "sdram_inf/sdram-lpddr3-hynix-4GB-800-no-odt.inc" #include "sdram_inf/sdram-lpddr3-hynix-4GB-800-no-odt.inc"
/* 933MHz, enable odt 120o */
#include "sdram_inf/sdram-lpddr3-hynix-4GB-933.inc"
}; };
enum dram_speeds { enum dram_speeds {
@ -43,6 +46,7 @@ enum dram_speeds {
dram_800MHz = 2, dram_800MHz = 2,
dram_666MHz_NO_ODT = 3, dram_666MHz_NO_ODT = 3,
dram_800MHz_NO_ODT = 4, dram_800MHz_NO_ODT = 4,
dram_933MHz = 5,
}; };
static enum dram_speeds get_sdram_index(void) static enum dram_speeds get_sdram_index(void)
@ -59,8 +63,10 @@ static enum dram_speeds get_sdram_index(void)
return dram_200MHz; return dram_200MHz;
case 3: case 3:
return dram_666MHz_NO_ODT; return dram_666MHz_NO_ODT;
default: case 4:
return dram_800MHz; return dram_800MHz;
default:
return dram_933MHz;
} }
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU)) if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU))

1563
src/mainboard/google/gru/sdram_inf/sdram-lpddr3-hynix-4GB-933.inc Normal file
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File diff suppressed because it is too large Load Diff

4
src/soc/rockchip/rk3399/clock.c
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@ -556,9 +556,9 @@ void rkclk_configure_ddr(unsigned int hz)
dpll_cfg = (struct pll_div) dpll_cfg = (struct pll_div)
{.refdiv = 1, .fbdiv = 100, .postdiv1 = 3, .postdiv2 = 1}; {.refdiv = 1, .fbdiv = 100, .postdiv1 = 3, .postdiv2 = 1};
break; break;
case 928*MHz: case 933*MHz:
dpll_cfg = (struct pll_div) dpll_cfg = (struct pll_div)
{.refdiv = 1, .fbdiv = 116, .postdiv1 = 3, .postdiv2 = 1}; {.refdiv = 3, .fbdiv = 350, .postdiv1 = 3, .postdiv2 = 1};
break; break;
default: default:
die("Unsupported SDRAM frequency, add to clock.c!"); die("Unsupported SDRAM frequency, add to clock.c!");

2
src/soc/rockchip/rk3399/sdram.c
View File

@ -992,7 +992,7 @@ void sdram_init(const struct rk3399_sdram_params *sdram_params)
printk(BIOS_INFO, "Starting SDRAM initialization...\n"); printk(BIOS_INFO, "Starting SDRAM initialization...\n");
if ((dramtype == DDR3 && ddr_freq > 800*MHz) || if ((dramtype == DDR3 && ddr_freq > 800*MHz) ||
(dramtype == LPDDR3 && ddr_freq > 928*MHz) || (dramtype == LPDDR3 && ddr_freq > 933*MHz) ||
(dramtype == LPDDR4 && ddr_freq > 800*MHz)) (dramtype == LPDDR4 && ddr_freq > 800*MHz))
die("SDRAM frequency is to high!"); die("SDRAM frequency is to high!");