From ba358a70d7d4cb2737f6bfc7df46b49010269b54 Mon Sep 17 00:00:00 2001 From: Matt Ziegelbaum Date: Mon, 11 Oct 2021 23:44:44 -0400 Subject: [PATCH] mb/google/hatch/var/scout: set correct i2c configuration Scout only uses I2C 1, 2, and 3 in DVT units. This removes extraneous I2C configuration copied from Puff. BUG=b:202195805 TEST=Boot scout, verify no more errors due to missing I2C devices Change-Id: Ide70a53e83b3e14540873062e3bef24d1134d2e1 Signed-off-by: Matt Ziegelbaum Reviewed-on: https://review.coreboot.org/c/coreboot/+/58236 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Paul Menzel --- .../google/hatch/variants/scout/gpio.c | 26 ++++++----- .../hatch/variants/scout/overridetree.cb | 45 ++++++------------- 2 files changed, 29 insertions(+), 42 deletions(-) diff --git a/src/mainboard/google/hatch/variants/scout/gpio.c b/src/mainboard/google/hatch/variants/scout/gpio.c index c916d556cd..5491efef9d 100644 --- a/src/mainboard/google/hatch/variants/scout/gpio.c +++ b/src/mainboard/google/hatch/variants/scout/gpio.c @@ -51,16 +51,14 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* C15 : WLAN_OFF_L */ PAD_CFG_GPO(GPP_C15, 1, DEEP), - - /* - * TODO(b/187094460): Re-enable touch screen I2C after resolving USB - * conflict - */ - + /* C16 : PCH_I2C_RFU_SDA (NC) */ + PAD_NC(GPP_C16, NONE), + /* C17 : PCH_I2C_RFU_SCL (NC) */ + PAD_NC(GPP_C17, NONE), /* C18 : PCH_I2C_USI_SDA */ - PAD_NC(GPP_C18, NONE), + PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), /* C19 : PCH_I2C_USI_SDL */ - PAD_NC(GPP_C19, NONE), + PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* D13 : SMBUS_ISP_SCALAR */ PAD_CFG_GPO(GPP_D13, 0, DEEP), @@ -112,14 +110,22 @@ static const struct pad_config gpio_table[] = { /* F22 : EMMC_RST_L */ PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1), - /* H4: PCH_I2C_PCON_SDA */ + /* H4: PCH_I2C_SCALER_SDA */ PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), - /* H5: PCH_I2C_PCON_SCL */ + /* H5: PCH_I2C_SCALER_SCL */ PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), /* H6 : PCH_I2C_TPU_SDA */ PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), /* H7 : PCH_I2C_TPU_SCL */ PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), + /* H8 : NC */ + PAD_NC(GPP_H8, NONE), + /* H9 : NC */ + PAD_NC(GPP_H9, NONE), + /* H10 : NC */ + PAD_NC(GPP_H10, NONE), + /* H11 : NC */ + PAD_NC(GPP_H11, NONE), /* H22 : PWM_PP3300_BIOZZER */ PAD_CFG_GPO(GPP_H22, 0, DEEP), }; diff --git a/src/mainboard/google/hatch/variants/scout/overridetree.cb b/src/mainboard/google/hatch/variants/scout/overridetree.cb index 8b7d558b47..9b33621177 100644 --- a/src/mainboard/google/hatch/variants/scout/overridetree.cb +++ b/src/mainboard/google/hatch/variants/scout/overridetree.cb @@ -4,11 +4,11 @@ chip soc/intel/cannonlake register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoDisabled, - [PchSerialIoIndexI2C1] = PchSerialIoDisabled, + [PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, - [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C4] = PchSerialIoDisabled, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, [PchSerialIoIndexSPI1] = PchSerialIoPci, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, @@ -150,20 +150,19 @@ chip soc/intel/cannonlake #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | - #| I2C2 | PS175 | - #| I2C3 | MST | - #| I2C4 | Audio | + #| I2C1 | USI (Touch screen) | + #| I2C2 | SCALER | + #| I2C3 | TPU | #+-------------------+---------------------------+ register "common_soc_config" = "{ .gspi[0] = { .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { + .i2c[1] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 0, - .fall_time_ns = 0, + .rise_time_ns = 60, + .fall_time_ns = 60, }, .i2c[2] = { .speed = I2C_SPEED_FAST, @@ -175,11 +174,6 @@ chip soc/intel/cannonlake .rise_time_ns = 60, .fall_time_ns = 60, }, - .i2c[4] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 60, - .fall_time_ns = 60, - }, }" # PCIe root port 7 for LAN @@ -380,24 +374,11 @@ chip soc/intel/cannonlake device pci 15.0 off # RFU - Reserved for Future Use. end # I2C #0 - device pci 15.1 off end # I2C #1 - device pci 15.2 off end # I2C #2, PCON PS175. - device pci 15.3 off end # I2C #3, Realtek RTD2142. + device pci 15.1 on end # I2C #1, USI (Touch screen) + device pci 15.2 on end # I2C #2, SCALER + device pci 15.3 on end # I2C #3, TPU device pci 16.0 on end # Management Engine Interface 1 - device pci 19.0 on - chip drivers/i2c/generic - register "hid" = ""10EC5682"" - register "name" = ""RT58"" - register "desc" = ""Realtek RT5682"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)" - register "property_count" = "1" - # Set the jd_src to RT5668_JD1 for jack detection - register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" - register "property_list[0].name" = ""realtek,jd-src"" - register "property_list[0].integer" = "1" - device i2c 1a on end - end - end #I2C #4 + device pci 19.0 off end # I2C #4 device pci 1a.0 on end # eMMC device pci 1c.6 on # PCI Root Port 7 (LAN) chip drivers/net # RTL8111H Ethernet NIC