soc/amd/stoneyridge/romstage.c: Remove repeated word

Change-Id: I38974b532f41830f49b54444d98e6bd7aa417aba
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>

src/soc/amd/stoneyridge/romstage.c

@@ -80,7 +80,7 @@ asmlinkage void car_stage_entry(void)
 		 *
 		 * After setting up DRAM, AGESA also completes the configuration
 		 * of the MTRRs, setting regions to WB.  Anything written to
-		 * memory between now and and when CAR is dismantled will be
+		 * memory between now and when CAR is dismantled will be
 		 * in cache and lost.  For now, set the regions UC to ensure
 		 * the writes get to DRAM.
 		 */