vboot2: Build verstage archive, then use that for building the stage
This slightly streamlines integrating the vboot2 library and prepares for merging verstage and bootblock on selected devices. Change-Id: I2163d1411d0c0c6bf80bce64796e1b6a5a02b802 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10004 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -360,6 +360,10 @@ $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h
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@printf " CC $(subst $(obj)/,,$(@))\n"
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC_bootblock) -MMD $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) $(bootblock-c-ccopts) -c -o $@ $<
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$(CC_bootblock) -MMD $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) $(bootblock-c-ccopts) -c -o $@ $<
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$(objgenerated)/libverstage.a: $$(verstage-objs)
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rm -f $@
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ar rcsT $@ $^
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#######################################################################
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#######################################################################
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# Clean up rules
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# Clean up rules
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clean-abuild:
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clean-abuild:
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@ -73,9 +73,9 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM
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# verification stage
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# verification stage
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###############################################################################
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###############################################################################
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$(objcbfs)/verstage.debug: $$(verstage-objs) $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $$(VB2_LIB)
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$(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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$(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld --start-group $(verstage-objs) --end-group
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$(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld --start-group $(objgenerated)/libverstage.a --end-group
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verstage-y += div0.c
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verstage-y += div0.c
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verstage-y += eabi_compat.c
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verstage-y += eabi_compat.c
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@ -84,9 +84,9 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM64
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ifeq ($(CONFIG_ARCH_VERSTAGE_ARM64),y)
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ifeq ($(CONFIG_ARCH_VERSTAGE_ARM64),y)
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$(objcbfs)/verstage.debug: $$(verstage-objs) $$(VB2_LIB) $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $(obj)/config.h
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$(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $(obj)/config.h
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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$(LD_verstage) --gc-sections -static -o $@ -L$(obj) --start-group $(verstage-objs) $(VBS_LIB) --end-group -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
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$(LD_verstage) --gc-sections -static -o $@ -L$(obj) --start-group $(objgenerated)/libverstage.a --end-group -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
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verstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
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verstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
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verstage-y += div0.c
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verstage-y += div0.c
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@ -56,6 +56,8 @@ $(VB2_LIB): $(obj)/config.h
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fwlib20
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fwlib20
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VERSTAGE_ELF = $(objcbfs)/verstage.elf
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VERSTAGE_ELF = $(objcbfs)/verstage.elf
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verstage-srcs += $(VB2_LIB)
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cbfs-files-y += $(call strip_quotes,$(CONFIG_CBFS_PREFIX))/verstage
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cbfs-files-y += $(call strip_quotes,$(CONFIG_CBFS_PREFIX))/verstage
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fallback/verstage-file = $(VERSTAGE_ELF)
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fallback/verstage-file = $(VERSTAGE_ELF)
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fallback/verstage-type = stage
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fallback/verstage-type = stage
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