vboot2: Build verstage archive, then use that for building the stage

This slightly streamlines integrating the vboot2 library and
prepares for merging verstage and bootblock on selected devices.

Change-Id: I2163d1411d0c0c6bf80bce64796e1b6a5a02b802
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10004
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi 2015-04-27 18:09:22 +02:00 committed by Patrick Georgi
parent 8b17404178
commit ba80887cfd
4 changed files with 10 additions and 4 deletions

View File

@ -360,6 +360,10 @@ $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h
@printf " CC $(subst $(obj)/,,$(@))\n"
$(CC_bootblock) -MMD $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) $(bootblock-c-ccopts) -c -o $@ $<
$(objgenerated)/libverstage.a: $$(verstage-objs)
rm -f $@
ar rcsT $@ $^
#######################################################################
# Clean up rules
clean-abuild:

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@ -73,9 +73,9 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM
# verification stage
###############################################################################
$(objcbfs)/verstage.debug: $$(verstage-objs) $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $$(VB2_LIB)
$(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
$(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld --start-group $(verstage-objs) --end-group
$(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld --start-group $(objgenerated)/libverstage.a --end-group
verstage-y += div0.c
verstage-y += eabi_compat.c

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@ -84,9 +84,9 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM64
ifeq ($(CONFIG_ARCH_VERSTAGE_ARM64),y)
$(objcbfs)/verstage.debug: $$(verstage-objs) $$(VB2_LIB) $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $(obj)/config.h
$(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $(obj)/config.h
@printf " LINK $(subst $(obj)/,,$(@))\n"
$(LD_verstage) --gc-sections -static -o $@ -L$(obj) --start-group $(verstage-objs) $(VBS_LIB) --end-group -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
$(LD_verstage) --gc-sections -static -o $@ -L$(obj) --start-group $(objgenerated)/libverstage.a --end-group -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
verstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
verstage-y += div0.c

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@ -56,6 +56,8 @@ $(VB2_LIB): $(obj)/config.h
fwlib20
VERSTAGE_ELF = $(objcbfs)/verstage.elf
verstage-srcs += $(VB2_LIB)
cbfs-files-y += $(call strip_quotes,$(CONFIG_CBFS_PREFIX))/verstage
fallback/verstage-file = $(VERSTAGE_ELF)
fallback/verstage-type = stage