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soc/intel/common/pch: Add server PCH option 

Add a server Kconfig option to select a subset of common PCH devices.
Client devices are included if server isn't selected. This maintains
the current Kconfig behavior.

Change-Id: If11d1a51192dd87ad770b8aa53ce02b6a28b8da8
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Marc Jones 2021-03-05 10:53:55 -07:00 committed by Marc Jones
parent 3322d33e08
commit bab0544200
1 changed files with 22 additions and 9 deletions
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31
src/soc/intel/common/pch/Kconfig
View File

@ -10,27 +10,30 @@ config SOC_INTEL_COMMON_PCH_BASE
code now having option to select required base PCH block to include
common IP block.
config SOC_INTEL_COMMON_PCH_SERVER
def_bool n
depends on SOC_INTEL_COMMON_PCH_BASE
help
SERVER is a subset of the COMMON_PCH_BASE and limits support to
server PCH devices (ex:, Intel C620 - Lewisburg).
if SOC_INTEL_COMMON_PCH_BASE
source "src/soc/intel/common/pch/*/Kconfig"
config PCH_SPECIFIC_OPTIONS
config PCH_SPECIFIC_BASE_OPTIONS
# Always include the BASE (SERVER) subset of devices
def_bool y
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
select SOC_INTEL_COMMON_BLOCK_CSE
select SOC_INTEL_COMMON_BLOCK_DSP
select SOC_INTEL_COMMON_BLOCK_DMI
select SOC_INTEL_COMMON_BLOCK_FAST_SPI
select SOC_INTEL_COMMON_BLOCK_GPIO
select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG
select SOC_INTEL_COMMON_BLOCK_GRAPHICS
select SOC_INTEL_COMMON_BLOCK_ITSS
select SOC_INTEL_COMMON_BLOCK_I2C
select SOC_INTEL_COMMON_BLOCK_LPC
select SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_DMI
select SOC_INTEL_COMMON_BLOCK_LPSS
select SOC_INTEL_COMMON_BLOCK_P2SB
select SOC_INTEL_COMMON_BLOCK_PCIE
select SOC_INTEL_COMMON_BLOCK_PCR
select SOC_INTEL_COMMON_BLOCK_PMC
select SOC_INTEL_COMMON_BLOCK_RTC
@ -40,10 +43,20 @@ config PCH_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_TCO
select SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS
select SOC_INTEL_COMMON_BLOCK_TIMER
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_BLOCK_XDCI
select SOC_INTEL_COMMON_BLOCK_XHCI
select SOC_INTEL_COMMON_PCH_LOCKDOWN
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
endif
config PCH_SPECIFIC_CLIENT_OPTIONS
# Include the CLIENT devices if this is not a SERVER
def_bool n if SOC_INTEL_COMMON_PCH_SERVER
def_bool y if !SOC_INTEL_COMMON_PCH_SERVER
select SOC_INTEL_COMMON_BLOCK_DSP
select SOC_INTEL_COMMON_BLOCK_GRAPHICS
select SOC_INTEL_COMMON_BLOCK_I2C
select SOC_INTEL_COMMON_BLOCK_LPSS
select SOC_INTEL_COMMON_BLOCK_PCIE
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_BLOCK_XDCI
endif # SOC_INTEL_COMMON_PCH_BASE