GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/*/*: Don't select PCIEXP_HOTPLUG 

PCIEXP_HOTPLUG has a prompt and as such is not supposed to be forced.
Just change the default value to 'y'.

Change-Id: Ie4248700f5ab5168bff551b740d347713273763c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51151
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Arthur Heymans 2021-03-01 19:06:29 +01:00 committed by Patrick Georgi
parent 6d9af0ce6e
commit bab7f18a43
3 changed files with 9 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/volteer/Kconfig
View File

@ -30,7 +30,6 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER
select MAINBOARD_HAS_SPI_TPM_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50 select MAINBOARD_HAS_SPI_TPM_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50
select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_VOLTEER2_TI50 select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_VOLTEER2_TI50
select MAINBOARD_HAS_TPM2 select MAINBOARD_HAS_TPM2
select PCIEXP_HOTPLUG
select SOC_INTEL_CSE_LITE_SKU select SOC_INTEL_CSE_LITE_SKU
select SOC_INTEL_TIGERLAKE select SOC_INTEL_TIGERLAKE
select HAVE_SPD_IN_CBFS select HAVE_SPD_IN_CBFS
@ -112,6 +111,9 @@ config MAX_CPUS
int int
default 8 default 8
config PCIEXP_HOTPLUG
default y
# Reserving resources for PCIe Hotplug as per TGL BIOS Spec (doc #611569) # Reserving resources for PCIe Hotplug as per TGL BIOS Spec (doc #611569)
# Revision 0.7.6 Section 7.2.5.1.5 # Revision 0.7.6 Section 7.2.5.1.5
config PCIEXP_HOTPLUG_BUSES config PCIEXP_HOTPLUG_BUSES

4
src/mainboard/intel/adlrvp/Kconfig
View File

@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_ALDERLAKE_PCH_M if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC select SOC_INTEL_ALDERLAKE_PCH_M if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
select HAVE_SPD_IN_CBFS select HAVE_SPD_IN_CBFS
select DRIVERS_SOUNDWIRE_ALC711 select DRIVERS_SOUNDWIRE_ALC711
select PCIEXP_HOTPLUG
config CHROMEOS config CHROMEOS
select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_SWITCH_ON
@ -85,6 +84,9 @@ config ADL_INTEL_EC
select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if VBOOT select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if VBOOT
endchoice endchoice
config PCIEXP_HOTPLUG
default y
config PCIEXP_HOTPLUG_BUSES config PCIEXP_HOTPLUG_BUSES
int int
default 42 default 42

4
src/mainboard/intel/tglrvp/Kconfig
View File

@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS
select INTEL_LPSS_UART_FOR_CONSOLE select INTEL_LPSS_UART_FOR_CONSOLE
select DRIVERS_INTEL_ISH select DRIVERS_INTEL_ISH
select EC_ACPI select EC_ACPI
select PCIEXP_HOTPLUG
select HAVE_SPD_IN_CBFS select HAVE_SPD_IN_CBFS
select SOC_INTEL_CSE_LITE_SKU select SOC_INTEL_CSE_LITE_SKU
select MAINBOARD_HAS_TPM2 select MAINBOARD_HAS_TPM2
@ -61,6 +60,9 @@ config MAX_CPUS
int int
default 8 default 8
config PCIEXP_HOTPLUG
default y
config PCIEXP_HOTPLUG_BUSES config PCIEXP_HOTPLUG_BUSES
int int
default 42 default 42