From bacd57dfaf7b4c5d3bc5400dbd82b896d0ed23cc Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Sat, 23 Feb 2019 18:24:35 +0100 Subject: [PATCH] cpu/x86/smm: Add qemu's SMM-Revision Level The SMI handler on qemu returned early, due to missing SMM-Revision Level support. Add the ID qemu uses, which is AMD64 compatible for qemu-system-x86_64. Fixes booting tianocore payload with SMM variable store on qemu. Change-Id: I978b94150cfc49a39c2a0818eb14a649850e451d Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/31594 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Paul Menzel --- src/cpu/x86/smm/smihandler.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index b2fc8b600f..8c65cbd828 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -168,6 +168,7 @@ void smi_handler(u32 smm_revision) smm_save_state(smm_base, SMM_EM64T101_ARCH_OFFSET, node); break; + case 0x00020064: case 0x00030064: state_save.type = AMD64; state_save.amd64_state_save =