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soc/intel/apl: Hook microcode updates up 

Only tested on APL.

Change-Id: I53f680fc4342a9bd1cd0ba9d72e025995e25f7f2
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/29902
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
This commit is contained in:
Nico Huber 2018-11-14 17:46:14 +01:00 committed by Nico Huber
parent a649310ea4
commit bae03a5195
2 changed files with 8 additions and 1 deletions
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1
src/soc/intel/apollolake/Kconfig
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@ -30,7 +30,6 @@ config CPU_SPECIFIC_OPTIONS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select IOAPIC
select PCR_COMMON_IOSF_1_0
select MICROCODE_BLOB_NOT_HOOKED_UP
select SMP
select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS

8
src/soc/intel/apollolake/Makefile.inc
View File

@ -175,4 +175,12 @@ cbfs-files-$(CONFIG_NHLT_RT5682) += $(RT5682_RENDER_CAPTURE)
$(RT5682_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(RT5682_RENDER_CAPTURE)
$(RT5682_RENDER_CAPTURE)-type := raw
ifeq ($(CONFIG_SOC_INTEL_GLK),y)
# Gemini Lake B0 (706a1) only atm.
cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_706ax/microcode.bin
else
# Apollo Lake 506c2, B0 (506c9) and E0 (506ca) only atm.
cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_506cx/microcode.bin
endif
endif # if CONFIG_SOC_INTEL_APOLLOLAKE