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mb/google/link: Use new PMBASE API 

Change-Id: If4d6c80e95469341f0c978f302f04508f50280bd
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Patrick Rudolph 2018-06-28 14:10:27 +02:00 committed by Patrick Georgi
parent 2dc63895eb
commit baea5994d8
1 changed files with 2 additions and 4 deletions
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6
src/mainboard/google/link/mainboard_smi.c
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@ -20,6 +20,7 @@
#include <southbridge/intel/bd82x6x/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <southbridge/intel/common/pmbase.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <cpu/intel/model_206ax/model_206ax.h>
#include <elog.h>
@ -31,7 +32,6 @@
static u8 mainboard_smi_ec(void)
{
u8 cmd = google_chromeec_get_event();
u32 pm1_cnt;
#if IS_ENABLED(CONFIG_ELOG_GSMI)
/* Log this event */
@ -44,9 +44,7 @@ static u8 mainboard_smi_ec(void)
printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
/* Go to S5 */
pm1_cnt = inl(smm_get_pmbase() + PM1_CNT);
pm1_cnt |= (0xf << 10);
outl(pm1_cnt, smm_get_pmbase() + PM1_CNT);
write_pmbase32(PM1_CNT, read_pmbase32(PM1_CNT) | (0xf << 10));
break;
}