soc/amd/common/block/cpu/mca: commonize mca_check_all_banks
Since we don't need to skip the MCA check on cold boot on MCAX capable systems, add a mca_skip_check implementation that always returns false. Change-Id: Id8fc4b6f02b6c02b03172fe11f0451a9893e514d Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56313 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -1,6 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/mca.h>
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#include <amdblocks/reset.h>
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#include <amdblocks/reset.h>
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#include <cpu/amd/msr.h>
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#include <cpu/amd/msr.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/lapic.h>
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@ -9,12 +8,12 @@
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#include <types.h>
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#include <types.h>
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#include "mca_common_defs.h"
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#include "mca_common_defs.h"
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static bool mca_skip_check(void)
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bool mca_skip_check(void)
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{
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{
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return !is_warm_reset();
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return !is_warm_reset();
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}
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}
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static void mca_print_error(unsigned int bank)
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void mca_print_error(unsigned int bank)
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{
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{
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msr_t msr;
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msr_t msr;
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@ -32,29 +31,3 @@ static void mca_print_error(unsigned int bank)
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msr = rdmsr(MC_CTL_MASK(bank));
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msr = rdmsr(MC_CTL_MASK(bank));
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printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
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printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
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}
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}
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void mca_check_all_banks(void)
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{
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struct mca_bank_status mci;
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const unsigned int num_banks = mca_get_bank_count();
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if (!mca_has_expected_bank_count())
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printk(BIOS_WARNING, "CPU has an unexpected number of MCA banks!\n");
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if (mca_skip_check())
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return;
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for (unsigned int i = 0 ; i < num_banks ; i++) {
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if (!mca_is_valid_bank(i))
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continue;
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mci.bank = i;
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mci.sts = rdmsr(IA32_MC_STATUS(i));
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if (mci.sts.hi || mci.sts.lo) {
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mca_print_error(i);
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if (CONFIG(ACPI_BERT) && mca_valid(mci.sts))
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build_bert_mca_error(&mci);
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}
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}
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}
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@ -2,8 +2,38 @@
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#include <amdblocks/mca.h>
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#include <amdblocks/mca.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/msr.h>
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#include <console/console.h>
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#include <types.h>
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#include "mca_common_defs.h"
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#include "mca_common_defs.h"
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static void mca_check_all_banks(void)
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{
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struct mca_bank_status mci;
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const unsigned int num_banks = mca_get_bank_count();
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if (!mca_has_expected_bank_count())
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printk(BIOS_WARNING, "CPU has an unexpected number of MCA banks!\n");
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if (mca_skip_check())
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return;
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for (unsigned int i = 0 ; i < num_banks ; i++) {
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if (!mca_is_valid_bank(i))
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continue;
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mci.bank = i;
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/* The MCA status register can be used in both the MCA and MCAX case */
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mci.sts = rdmsr(IA32_MC_STATUS(i));
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if (mci.sts.hi || mci.sts.lo) {
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mca_print_error(i);
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if (CONFIG(ACPI_BERT) && mca_valid(mci.sts))
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build_bert_mca_error(&mci);
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}
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}
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}
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void check_mca(void)
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void check_mca(void)
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{
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{
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mca_check_all_banks();
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mca_check_all_banks();
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@ -5,8 +5,10 @@
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#include <amdblocks/mca.h>
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#include <amdblocks/mca.h>
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#include <cper.h>
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#include <cper.h>
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#include <types.h>
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void mca_check_all_banks(void);
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bool mca_skip_check(void);
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void mca_print_error(unsigned int bank);
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void build_bert_mca_error(struct mca_bank_status *mci);
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void build_bert_mca_error(struct mca_bank_status *mci);
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enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci);
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enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci);
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void fill_generic_section(cper_proc_generic_error_section_t *sec, struct mca_bank_status *mci);
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void fill_generic_section(cper_proc_generic_error_section_t *sec, struct mca_bank_status *mci);
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/mca.h>
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#include <amdblocks/msr_zen.h>
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#include <amdblocks/msr_zen.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/msr.h>
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@ -8,7 +7,14 @@
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#include <types.h>
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#include <types.h>
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#include "mca_common_defs.h"
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#include "mca_common_defs.h"
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static void mca_print_error(unsigned int bank)
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bool mca_skip_check(void)
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{
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/* On Zen-based CPUs/APUs the MCA(X) status register have a defined state even in the
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cold boot path, so no need to skip the check */
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return false;
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}
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void mca_print_error(unsigned int bank)
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{
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{
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msr_t msr;
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msr_t msr;
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msr = rdmsr(MCA_CTL_MASK_MSR(bank));
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msr = rdmsr(MCA_CTL_MASK_MSR(bank));
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printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
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printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
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}
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}
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void mca_check_all_banks(void)
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{
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struct mca_bank_status mci;
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const unsigned int num_banks = mca_get_bank_count();
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if (!mca_has_expected_bank_count())
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printk(BIOS_WARNING, "CPU has an unexpected number of MCA banks!\n");
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for (unsigned int i = 0 ; i < num_banks ; i++) {
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if (!mca_is_valid_bank(i))
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continue;
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mci.bank = i;
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mci.sts = rdmsr(MCAX_STATUS_MSR(i));
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if (mci.sts.hi || mci.sts.lo) {
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mca_print_error(i);
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if (CONFIG(ACPI_BERT) && mca_valid(mci.sts))
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build_bert_mca_error(&mci);
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}
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}
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}
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