mb/google/poppy/variants/nautilus: Add gpio-keys ACPI node for PENH
This change uses gpio_keys driver to add ACPI node for pen eject event. BUG=b:71329519 TEST=Verified using evtest that pen eject event results in events as expected. Change-Id: Ib293c2ca532c8ed9e2587143b1a69300cd9fa4e9 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/23238 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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@ -2,6 +2,7 @@
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config BOARD_GOOGLE_BASEBOARD_POPPY
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config BOARD_GOOGLE_BASEBOARD_POPPY
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def_bool n
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def_bool n
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select BOARD_ROMSIZE_KB_16384
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select BOARD_ROMSIZE_KB_16384
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select DRIVERS_GENERIC_GPIO_KEYS
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_HID
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC
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@ -321,6 +321,15 @@ chip soc/intel/skylake
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register "hid_desc_reg_offset" = "0x1"
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register "hid_desc_reg_offset" = "0x1"
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device i2c 0x9 on end
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device i2c 0x9 on end
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end
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end
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chip drivers/generic/gpio_keys
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register "name" = ""PENH""
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register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_B19)"
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register "key.dev_name" = ""EJCT""
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register "key.linux_code" = "SW_PEN_INSERTED"
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register "key.linux_input_type" = "EV_SW"
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register "key.label" = ""pen_eject""
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device generic 0 on end
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end
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end # I2C #3
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end # I2C #3
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.1 off end # Management Engine Interface 2
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@ -101,7 +101,7 @@ static const struct pad_config gpio_table[] = {
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/* B18 : GSPI0_MOSI ==> NC */
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/* B18 : GSPI0_MOSI ==> NC */
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PAD_CFG_NC(GPP_B18),
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PAD_CFG_NC(GPP_B18),
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/* B19 : GSPI1_CS# ==> CHP3_PEN_EJECT - for notification */
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/* B19 : GSPI1_CS# ==> CHP3_PEN_EJECT - for notification */
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PAD_CFG_GPI(GPP_B19, NONE, DEEP),
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PAD_CFG_GPI_GPIO_DRIVER(GPP_B19, NONE, DEEP),
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/* B20 : GSPI1_CLK ==> NC */
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/* B20 : GSPI1_CLK ==> NC */
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PAD_CFG_NC(GPP_B20),
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PAD_CFG_NC(GPP_B20),
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/* B21 : GSPI1_MISO ==> CHP3_PEN_EJECT - for wake event */
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/* B21 : GSPI1_MISO ==> CHP3_PEN_EJECT - for wake event */
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