GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

inteltool: added more device IDs 

Change-Id: I6f2272ae4071025e671638e83bade6a96aac658b
Signed-off-by: Ruud Schramp <schramp@holmes.nl>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/185
Tested-by: build bot (Jenkins)
This commit is contained in:
Ruud Schramp 2011-04-04 07:53:19 +02:00 committed by Patrick Georgi
parent 4e22a3bc58
commit bb41f50244
4 changed files with 12 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
util/inteltool/inteltool.c
View File

@ -80,6 +80,8 @@ static const struct {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH0, "ICH0" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH0, "ICH0" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH, "ICH" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH, "ICH" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "82371AB/EB/MB" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "82371AB/EB/MB" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X44, "82X38/X48" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_32X0, "3200/3210" },
}; };
#ifndef __DARWIN__ #ifndef __DARWIN__

2
util/inteltool/inteltool.h
View File

@ -78,6 +78,8 @@
#define PCI_DEVICE_ID_INTEL_82Q35 0x29b0 #define PCI_DEVICE_ID_INTEL_82Q35 0x29b0
#define PCI_DEVICE_ID_INTEL_82G33 0x29c0 #define PCI_DEVICE_ID_INTEL_82G33 0x29c0
#define PCI_DEVICE_ID_INTEL_82Q33 0x29d0 #define PCI_DEVICE_ID_INTEL_82Q33 0x29d0
#define PCI_DEVICE_ID_INTEL_X44 0x29e0
#define PCI_DEVICE_ID_INTEL_32X0 0x29f0
#define PCI_DEVICE_ID_INTEL_GS45 0x2a40 #define PCI_DEVICE_ID_INTEL_GS45 0x2a40
#define PCI_DEVICE_ID_INTEL_X58 0x3405 #define PCI_DEVICE_ID_INTEL_X58 0x3405
#define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100

2
util/inteltool/memory.c
View File

@ -109,6 +109,8 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc)
printf("This northbridge does not have MCHBAR.\n"); printf("This northbridge does not have MCHBAR.\n");
return 1; return 1;
case PCI_DEVICE_ID_INTEL_GS45: case PCI_DEVICE_ID_INTEL_GS45:
case PCI_DEVICE_ID_INTEL_X44:
case PCI_DEVICE_ID_INTEL_32X0:
mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe; mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe;
mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32; mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;
break; break;

6
util/inteltool/pcie.c
View File

@ -45,6 +45,8 @@ int print_epbar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_82Q35: case PCI_DEVICE_ID_INTEL_82Q35:
case PCI_DEVICE_ID_INTEL_82G33: case PCI_DEVICE_ID_INTEL_82G33:
case PCI_DEVICE_ID_INTEL_82Q33: case PCI_DEVICE_ID_INTEL_82Q33:
case PCI_DEVICE_ID_INTEL_X44:
case PCI_DEVICE_ID_INTEL_32X0:
case PCI_DEVICE_ID_INTEL_GS45: case PCI_DEVICE_ID_INTEL_GS45:
case PCI_DEVICE_ID_INTEL_ATOM_DXXX: case PCI_DEVICE_ID_INTEL_ATOM_DXXX:
case PCI_DEVICE_ID_INTEL_ATOM_NXXX: case PCI_DEVICE_ID_INTEL_ATOM_NXXX:
@ -104,6 +106,8 @@ int print_dmibar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_82Q35: case PCI_DEVICE_ID_INTEL_82Q35:
case PCI_DEVICE_ID_INTEL_82G33: case PCI_DEVICE_ID_INTEL_82G33:
case PCI_DEVICE_ID_INTEL_82Q33: case PCI_DEVICE_ID_INTEL_82Q33:
case PCI_DEVICE_ID_INTEL_X44:
case PCI_DEVICE_ID_INTEL_32X0:
case PCI_DEVICE_ID_INTEL_GS45: case PCI_DEVICE_ID_INTEL_GS45:
case PCI_DEVICE_ID_INTEL_ATOM_DXXX: case PCI_DEVICE_ID_INTEL_ATOM_DXXX:
case PCI_DEVICE_ID_INTEL_ATOM_NXXX: case PCI_DEVICE_ID_INTEL_ATOM_NXXX:
@ -167,6 +171,8 @@ int print_pciexbar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_82Q35: case PCI_DEVICE_ID_INTEL_82Q35:
case PCI_DEVICE_ID_INTEL_82G33: case PCI_DEVICE_ID_INTEL_82G33:
case PCI_DEVICE_ID_INTEL_82Q33: case PCI_DEVICE_ID_INTEL_82Q33:
case PCI_DEVICE_ID_INTEL_X44:
case PCI_DEVICE_ID_INTEL_32X0:
case PCI_DEVICE_ID_INTEL_GS45: case PCI_DEVICE_ID_INTEL_GS45:
case PCI_DEVICE_ID_INTEL_ATOM_DXXX: case PCI_DEVICE_ID_INTEL_ATOM_DXXX:
case PCI_DEVICE_ID_INTEL_ATOM_NXXX: case PCI_DEVICE_ID_INTEL_ATOM_NXXX: