google/kukui: Update MMU table in romstage and ramstage
In order to get better performance, map dram as cached after dram ready in romstage. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui. Need a futher check after dram calibration code ready. Change-Id: Ie541fe08ee1d5b260abbabc0a5c18fb04e602b9c Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27304 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -8,4 +8,5 @@ romstage-y += memlayout.ld
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romstage-y += romstage.c
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ramstage-y += chromeos.c
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ramstage-y += mainboard.c
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ramstage-y += memlayout.ld
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@ -0,0 +1,31 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <soc/mmu_operations.h>
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static void mainboard_init(struct device *dev)
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{
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}
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static void mainboard_enable(struct device *dev)
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{
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dev->ops->init = &mainboard_init;
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}
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struct chip_operations mainboard_ops = {
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.name = CONFIG_MAINBOARD_PART_NUMBER,
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.enable_dev = mainboard_enable,
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};
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@ -16,6 +16,7 @@
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#include <arch/exception.h>
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#include <console/console.h>
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#include <program_loading.h>
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#include <soc/mmu_operations.h>
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#include <timestamp.h>
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void main(void)
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@ -26,5 +27,7 @@ void main(void)
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console_init();
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exception_init();
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mtk_mmu_after_dram();
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run_ramstage();
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}
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