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ASL: Use temporary variable when storing register into itself. 

Otherwise it triggers a IASL warning with new IASL.

Change-Id: I090ee18df78ea779137ee6797c55b96ea27e6d27
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13623
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Vladimir Serbinenko 2016-02-08 00:09:55 +01:00 committed by Martin Roth
parent 01586063ab
commit bb7dbcdf30
3 changed files with 14 additions and 7 deletions
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3
src/mainboard/amd/dinar/dsdt.asl
View File

@ -802,7 +802,8 @@ DefinitionBlock (
}
/* Arbitrarily clear PciExpWakeStatus */
Store(PEWS, PEWS)
Store(PEWS, Local0)
Store(Local0, PEWS)
/* if(DeRefOf(Index(WKST,0))) {
* Store(0, Index(WKST,1))

3
src/mainboard/amd/torpedo/dsdt.asl
View File

@ -774,7 +774,8 @@ DefinitionBlock (
}
/* Arbitrarily clear PciExpWakeStatus */
Store(PEWS, PEWS)
Store(PEWS, Local0)
Store(Local0, PEWS)
/* if(DeRefOf(Index(WKST,0))) {
* Store(0, Index(WKST,1))

15
src/mainboard/hp/dl145_g1/dsdt.asl
View File

@ -250,11 +250,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
Notify (\_SB.PWRB, 0x02)
}
}
Store (\_SB.PCI0.GSTS, \_SB.PCI0.GSTS)
Store (\_SB.PCI0.STMC, \_SB.PCI0.STMC)
Store (\_SB.PCI0.STC0, \_SB.PCI0.STC0)
Store (\_SB.PCI0.STC1, \_SB.PCI0.STC1)
Store (\_SB.PCI0.STHW, \_SB.PCI0.STHW)
Store (\_SB.PCI0.GSTS, Local0)
Store (Local0, \_SB.PCI0.GSTS)
Store (\_SB.PCI0.STMC, Local0)
Store (Local0, \_SB.PCI0.STMC)
Store (\_SB.PCI0.STC0, Local0)
Store (Local0, \_SB.PCI0.STC0)
Store (\_SB.PCI0.STC1, Local0)
Store (Local0, \_SB.PCI0.STC1)
Store (\_SB.PCI0.STHW, Local0)
Store (Local0, \_SB.PCI0.STHW)
If (LEqual (Arg0, 0x03)) { // Wake from S3 state
Notify (\_SB.PCI0.TP2P.USB0, 0x01)
}