soc/fsp_broadwell_de: Implement SMBus read/write over IMC
Add read/write functions to hook it up with existing SPD retrieval code. Signed-off-by: Andrey Petrov <anpetrov@fb.com> Change-Id: I9f5993dc795badf72751a4e6c9d974119a653e30 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34679 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -14,6 +14,7 @@ subdirs-y += ../../../lib/fsp
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romstage-y += gpio.c
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romstage-y += gpio.c
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romstage-y += memmap.c
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romstage-y += memmap.c
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romstage-y += tsc_freq.c
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romstage-y += tsc_freq.c
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romstage-y += smbus-imc.c
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postcar-y += tsc_freq.c
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postcar-y += tsc_freq.c
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@ -126,4 +126,9 @@
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#define SMM_FUNC 0x06
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#define SMM_FUNC 0x06
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#define SMM_DEV_FUNC PCI_DEVFN(SMM_DEV, SMM_FUNC)
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#define SMM_DEV_FUNC PCI_DEVFN(SMM_DEV, SMM_FUNC)
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#define IMC_DEV0 19
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#define IMC_FUNC0 0
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#define IMC_DEV PCI_DEV(QPI_BUS, IMC_DEV0, IMC_FUNC0)
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#endif /* _SOC_PCI_DEVS_H_ */
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#endif /* _SOC_PCI_DEVS_H_ */
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@ -0,0 +1,59 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2019 Facebook, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stddef.h>
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#include <console/console.h>
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#include <device/pci_def.h>
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#include <device/early_smbus.h>
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#include <intelblocks/imc.h>
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#include <soc/pci_devs.h>
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#include <spd.h>
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/* read word, return value on success */
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uint16_t smbus_read_word(u32 smbus_dev, u8 addr, u8 offset)
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{
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uint16_t res = 0;
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if (imc_smbus_spd_xfer(IMC_DEV, addr, offset, IMC_DEVICE_EEPROM, IMC_DATA_WORD,
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IMC_CONTROLLER_ID0, IMC_READ, &res)
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== 0) {
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return res;
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}
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return 0;
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}
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/* read byte, return value on success */
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uint8_t smbus_read_byte(u32 smbus_dev, u8 addr, u8 offset)
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{
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uint16_t res = 0;
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if (imc_smbus_spd_xfer(IMC_DEV, addr, offset, IMC_DEVICE_EEPROM, IMC_DATA_BYTE,
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IMC_CONTROLLER_ID0, IMC_READ, &res)
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== 0) {
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return res;
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}
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return 0;
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}
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/* write byte, return 0 on success, -1 otherwise */
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uint8_t smbus_write_byte(u32 smbus_dev, u8 addr, u8 offset, u8 value)
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{
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if (imc_smbus_spd_xfer(IMC_DEV, addr, offset, IMC_DEVICE_WP_EEPROM, IMC_DATA_BYTE,
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IMC_CONTROLLER_ID0, IMC_WRITE, &value)
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== 0) {
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return 0;
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}
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return -1;
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}
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