diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc
index da93827274..327b6c6720 100644
--- a/src/cpu/x86/smm/Makefile.inc
+++ b/src/cpu/x86/smm/Makefile.inc
@@ -29,14 +29,10 @@ endif
 
 smm-y += save_state.c
 
-ifeq ($(CONFIG_SMM_TSEG),y)
-
 ramstage-y += tseg_region.c
 romstage-y += tseg_region.c
 postcar-y += tseg_region.c
 
-endif
-
 ifeq ($(CONFIG_PARALLEL_MP),y)
 
 smmstub-y += smm_stub.S
diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c
index 6f334a2e81..6924f08e78 100644
--- a/src/cpu/x86/smm/smm_module_loader.c
+++ b/src/cpu/x86/smm/smm_module_loader.c
@@ -409,11 +409,6 @@ static int append_and_check_region(const struct region smram,
 int smm_load_module(const uintptr_t smram_base, const size_t smram_size,
 		    struct smm_loader_params *params)
 {
-	if (CONFIG(SMM_ASEG) && (smram_base != SMM_BASE || smram_size != SMM_CODE_SEGMENT_SIZE)) {
-		printk(BIOS_ERR, "SMM base & size are 0x%lx, 0x%zx, but must be 0x%x, 0x%x\n",
-		       smram_base, smram_size, SMM_BASE, SMM_CODE_SEGMENT_SIZE);
-		return -1;
-	}
 	/*
 	 * Place in .bss to reduce stack usage.
 	 * TODO: once CPU_INFO_V2 is used everywhere, use smaller stack for APs and move
diff --git a/src/cpu/x86/smm/tseg_region.c b/src/cpu/x86/smm/tseg_region.c
index f6aecd0557..413d5fcb8b 100644
--- a/src/cpu/x86/smm/tseg_region.c
+++ b/src/cpu/x86/smm/tseg_region.c
@@ -26,7 +26,12 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
 	const size_t ied_size = CONFIG_IED_REGION_SIZE;
 	const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
 
-	smm_region(&sub_base, &sub_size);
+	if (CONFIG(SMM_TSEG))
+		smm_region(&sub_base, &sub_size);
+	else if (CONFIG(SMM_ASEG))
+		aseg_region(&sub_base, &sub_size);
+	else
+		return -1;
 
 	ASSERT(IS_ALIGNED(sub_base, sub_size));
 	ASSERT(sub_size > (cache_size + ied_size));
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index b6d778b4c9..7283a6b4b6 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -165,6 +165,12 @@ void restore_default_smm_area(void *smm_save_area);
  */
 void smm_region(uintptr_t *start, size_t *size);
 
+static inline void aseg_region(uintptr_t *start, size_t *size)
+{
+	*start = SMM_BASE;
+	*size = SMM_DEFAULT_SIZE; /* SMM_CODE_SEGMENT_SIZE ? */
+}
+
 enum {
 	/* SMM handler area. */
 	SMM_SUBREGION_HANDLER,
diff --git a/src/mainboard/emulation/qemu-q35/cpu.c b/src/mainboard/emulation/qemu-q35/cpu.c
index c84b756587..58b1fa5d7f 100644
--- a/src/mainboard/emulation/qemu-q35/cpu.c
+++ b/src/mainboard/emulation/qemu-q35/cpu.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <commonlib/helpers.h>
 #include <console/console.h>
 #include <cpu/amd/amd64_save_state.h>
 #include <cpu/intel/smm_reloc.h>
@@ -15,14 +16,10 @@ static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
 {
 	printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
 
-	if (CONFIG(SMM_TSEG))
-		smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
+	smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
 
-	if (CONFIG(SMM_ASEG)) {
+	if (CONFIG(SMM_ASEG))
 		smm_open_aseg();
-		*perm_smbase = 0xa0000;
-		*perm_smsize = 0x10000;
-	}
 
 	/* FIXME: on X86_64 the save state size is smaller than the size of the SMM stub */
 	*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);