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mb/amd/mandolin: move PCIe GPP clock setting to devicetree 

Checked with the schematics that all PCIe clocks have a corresponding
clock enable pin.

BUG=b:149970243
BRANCH=zork

Change-Id: If96cdf95e213682217e46a98fc69c5c2ef4a148d
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44892
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2020-08-28 02:09:29 +02:00 committed by Patrick Georgi
parent d555d6a88c
commit bbed4d9ff0
1 changed files with 9 additions and 0 deletions
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9
src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb
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@ -115,6 +115,15 @@ chip soc/amd/picasso
.flash_ch_en = 0,
}"
# genral purpose PCIe clock output configuration
register "gpp_clk_config[0]" = "GPP_CLK_REQ"
register "gpp_clk_config[1]" = "GPP_CLK_REQ"
register "gpp_clk_config[2]" = "GPP_CLK_REQ"
register "gpp_clk_config[3]" = "GPP_CLK_REQ"
register "gpp_clk_config[4]" = "GPP_CLK_REQ"
register "gpp_clk_config[5]" = "GPP_CLK_REQ"
register "gpp_clk_config[6]" = "GPP_CLK_REQ"
device cpu_cluster 0 on
device lapic 0 on end
end