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console uart: Fill coreboot table entries 

Also fixes the reported baudrate to take get_option() into account.

Change-Id: Ieadad70b00df02a530b0ccb6fa4e1b51526089f3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5310
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki 2014-03-15 01:32:55 +02:00 committed by Patrick Georgi
parent c2610a4a18
commit bbf6f3d384
10 changed files with 128 additions and 86 deletions
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25
src/cpu/allwinner/a10/uart_console.c
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@ -10,6 +10,7 @@
#include <types.h>
#include <console/uart.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <cpu/allwinner/a10/uart.h>
@ -43,6 +44,11 @@ unsigned int uart_platform_refclk(void)
return 24000000;
}
unsigned int uart_platform_base(int idx)
{
return (unsigned int)get_console_uart_base_addr();
}
void uart_init(void)
{
void *uart_base = get_console_uart_base_addr();
@ -63,14 +69,19 @@ void uart_tx_byte(unsigned char data)
a10_uart_tx_blocking(get_console_uart_base_addr(), data);
}
#if !defined(__PRE_RAM__)
uint32_t uartmem_getbaseaddr(void)
{
return (uint32_t) get_console_uart_base_addr();
}
#endif
void uart_tx_flush(void)
{
}
#ifndef __PRE_RAM__
void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
#endif

21
src/cpu/samsung/exynos5250/uart.c
View File

@ -19,6 +19,7 @@
#include <console/uart.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include "uart.h"
#include "clk.h"
#include "cpu.h"
@ -159,13 +160,6 @@ unsigned int uart_platform_base(int idx)
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
}
#if !defined(__PRE_RAM__)
uint32_t uartmem_getbaseaddr(void)
{
return uart_platform_base(0);
}
#endif
void uart_init(void)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
@ -189,3 +183,16 @@ void uart_tx_flush(void)
struct s5p_uart *uart = uart_platform_baseptr(0);
exynos5_uart_tx_flush(uart);
}
#ifndef __PRE_RAM__
void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
#endif

21
src/cpu/samsung/exynos5420/uart.c
View File

@ -19,6 +19,7 @@
#include <console/uart.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include "uart.h"
#include "clk.h"
#include "cpu.h"
@ -151,13 +152,6 @@ unsigned int uart_platform_base(int idx)
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
}
#if !defined(__PRE_RAM__)
uint32_t uartmem_getbaseaddr(void)
{
return uart_platform_base(0);
}
#endif
void uart_init(void)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
@ -180,3 +174,16 @@ void uart_tx_flush(void)
{
/* Exynos5250 implements this too. */
}
#ifndef __PRE_RAM__
void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
#endif

21
src/cpu/ti/am335x/uart.c
View File

@ -20,6 +20,7 @@
#include <types.h>
#include <console/uart.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <cpu/ti/am335x/uart.h>
#define EFR_ENHANCED_EN (1 << 4)
@ -156,13 +157,6 @@ unsigned int uart_platform_base(int idx)
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
}
#if !defined(__PRE_RAM__)
uint32_t uartmem_getbaseaddr(void)
{
return uart_platform_base(0);
}
#endif
void uart_init(void)
{
struct am335x_uart *uart = uart_platform_baseptr(0);
@ -186,3 +180,16 @@ void uart_tx_byte(unsigned char data)
void uart_tx_flush(void)
{
}
#ifndef __PRE_RAM__
void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
#endif

12
src/drivers/oxford/oxpcie/oxpcie_early.c
View File

@ -24,7 +24,9 @@
#include <arch/io.h>
#include <arch/early_variables.h>
#include <delay.h>
#include <boot/coreboot_tables.h>
#include <console/uart.h>
#include <device/pci.h>
#include <device/pci_def.h>
static unsigned int oxpcie_present CAR_GLOBAL;
@ -139,9 +141,15 @@ void oxford_remap(u32 new_base)
uart1_base = new_base + 0x2000;
}
uint32_t uartmem_getbaseaddr(void)
void uart_fill_lb(void *data)
{
return uart_platform_base(0);
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
#endif

21
src/drivers/uart/pl011.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <boot/coreboot_tables.h>
#include <console/uart.h>
static void pl011_uart_tx_byte(unsigned int *uart_base, unsigned char data)
@ -25,13 +26,6 @@ unsigned int uart_platform_base(int idx)
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
}
#if !defined(__PRE_RAM__)
uint32_t uartmem_getbaseaddr(void)
{
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
}
#endif
void uart_init(void)
{
}
@ -50,3 +44,16 @@ unsigned char uart_rx_byte(void)
{
return 0;
}
#ifndef __PRE_RAM__
void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
#endif

22
src/drivers/uart/uart8250io.c
View File

@ -23,6 +23,10 @@
#include <trace.h>
#include "uart8250reg.h"
#ifndef __ROMCC__
#include <boot/coreboot_tables.h>
#endif
/* Should support 8250, 16450, 16550, 16550A type UARTs */
/* Nominal values only, good for the range of choices Kconfig offers for
@ -102,6 +106,11 @@ static void uart8250_init(unsigned base_port, unsigned divisor)
*/
static const unsigned bases[1] = { CONFIG_TTYS0_BASE };
unsigned int uart_platform_base(int idx)
{
return bases[idx];
}
void uart_init(void)
{
unsigned int div;
@ -129,3 +138,16 @@ void uart_tx_flush(void)
{
uart8250_tx_flush(bases[0]);
}
#ifndef __PRE_RAM__
void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_IO_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
}
#endif

4
src/include/boot/coreboot_tables.h
View File

@ -340,4 +340,8 @@ unsigned long write_coreboot_table(
void fill_lb_gpios(struct lb_gpios *gpios);
void uart_fill_lb(void *data);
void lb_add_serial(struct lb_serial *serial, void *data);
void lb_add_console(uint16_t consoletype, void *data);
#endif /* COREBOOT_TABLES_H */

1
src/include/console/uart.h
View File

@ -46,7 +46,6 @@ unsigned char uart_rx_byte(void);
int uart_can_rx_byte(void);
unsigned int uart_platform_base(int idx);
uint32_t uartmem_getbaseaddr(void);
#if !defined(__ROMCC__)
static inline void *uart_platform_baseptr(int idx)

66
src/lib/coreboot_table.c
View File

@ -102,43 +102,22 @@ static struct lb_memory *lb_memory(struct lb_header *header)
return mem;
}
static struct lb_serial *lb_serial(struct lb_header *header)
void lb_add_serial(struct lb_serial *new_serial, void *data)
{
#if CONFIG_CONSOLE_SERIAL8250
struct lb_record *rec;
struct lb_header *header = (struct lb_header *)data;
struct lb_serial *serial;
rec = lb_new_record(header);
serial = (struct lb_serial *)rec;
serial = (struct lb_serial *)lb_new_record(header);
serial->tag = LB_TAG_SERIAL;
serial->size = sizeof(*serial);
serial->type = LB_SERIAL_TYPE_IO_MAPPED;
serial->baseaddr = CONFIG_TTYS0_BASE;
serial->baud = CONFIG_TTYS0_BAUD;
return serial;
#elif CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART
if (uartmem_getbaseaddr()) {
struct lb_record *rec;
struct lb_serial *serial;
rec = lb_new_record(header);
serial = (struct lb_serial *)rec;
serial->tag = LB_TAG_SERIAL;
serial->size = sizeof(*serial);
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = uartmem_getbaseaddr();
serial->baud = CONFIG_TTYS0_BAUD;
return serial;
} else {
return NULL;
}
#else
return NULL;
#endif
serial->type = new_serial->type;
serial->baseaddr = new_serial->baseaddr;
serial->baud = new_serial->baud;
}
#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || \
CONFIG_CONSOLE_SERIAL_UART || CONFIG_CONSOLE_USB
static void add_console(struct lb_header *header, u16 consoletype)
void lb_add_console(uint16_t consoletype, void *data)
{
struct lb_header *header = (struct lb_header *)data;
struct lb_console *console;
console = (struct lb_console *)lb_new_record(header);
@ -146,20 +125,6 @@ static void add_console(struct lb_header *header, u16 consoletype)
console->size = sizeof(*console);
console->type = consoletype;
}
#endif
static void lb_console(struct lb_header *header)
{
#if CONFIG_CONSOLE_SERIAL8250
add_console(header, LB_TAG_CONSOLE_SERIAL8250);
#endif
#if CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART
add_console(header, LB_TAG_CONSOLE_SERIAL8250MEM);
#endif
#if CONFIG_CONSOLE_USB
add_console(header, LB_TAG_CONSOLE_EHCI);
#endif
}
static void lb_framebuffer(struct lb_header *header)
{
@ -423,10 +388,15 @@ unsigned long write_coreboot_table(
/* Record our motherboard */
lb_mainboard(head);
/* Record the serial port, if present */
lb_serial(head);
/* Record our console setup */
lb_console(head);
/* Record the serial ports and consoles */
#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART
uart_fill_lb(head);
#endif
#if CONFIG_CONSOLE_USB
lb_add_console(LB_TAG_CONSOLE_EHCI, head);
#endif
/* Record our various random string information */
lb_strings(head);
/* Record our framebuffer */