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Minor ma785gmt clean-up 

Change-Id: I9e889a6c475fb3283fa11f8b3de5baaf54235589
Signed-off-by: Alec Ari <neotheuser@ymail.com>
Reviewed-on: http://review.coreboot.org/167
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Alec Ari 2011-08-21 22:09:53 -05:00 committed by Patrick Georgi
parent e1562bdccb
commit bc081cdf6d
4 changed files with 6 additions and 9 deletions
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2
src/mainboard/gigabyte/Kconfig
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@ -29,7 +29,7 @@ config BOARD_GIGABYTE_GA_6BXE
bool "GA-6BXE"
config BOARD_GIGABYTE_M57SLI
bool "GA-M57SLI-S4"
config BOARD_GIGABYTE_GA785GMT
config BOARD_GIGABYTE_MA785GMT
bool "GA-MA785GMT-UD2H"
config BOARD_GIGABYTE_MA78GM
bool "GA-MA78GM-US2H"

4
src/mainboard/gigabyte/ma785gmt/Kconfig
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@ -1,4 +1,4 @@
if BOARD_GIGABYTE_GA785GMT
if BOARD_GIGABYTE_MA785GMT
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
@ -83,4 +83,4 @@ config RAMBASE
hex
default 0x200000
endif # BOARD_GIGABYTE_GA785GMT
endif # BOARD_GIGABYTE_MA785GMT

2
src/mainboard/gigabyte/ma785gmt/devicetree.cb
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@ -1,4 +1,4 @@
# sample config for gigabyte ga785gmt
# sample config for gigabyte/ma785gmt
chip northbridge/amd/amdfam10/root_complex
device lapic_cluster 0 on
chip cpu/amd/socket_AM3 #L1 and DDR3

7
src/mainboard/gigabyte/ma785gmt/mainboard.c
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@ -96,8 +96,6 @@ void set_pcie_reset()
pci_write_config16(sm_dev, 0x7e, word);
}
/*
* justify the dev3 is exist or not
*/
@ -126,7 +124,6 @@ int is_dev3_present(void)
}
}
/*
* set gpio40 gfx
*/
@ -253,7 +250,7 @@ static void set_thermal_config(void)
*************************************************/
static void ma785gmt_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard Gigabyte ma785gmt Enable. dev=0x%p\n", dev);
printk(BIOS_INFO, "Mainboard MA785GMT-UD2H Enable. dev=0x%p\n", dev);
#if (CONFIG_GFXUMA == 1)
msr_t msr, msr2;
@ -315,6 +312,6 @@ int add_mainboard_resources(struct lb_memory *mem)
}
struct chip_operations mainboard_ops = {
CHIP_NAME("GIGABYTE MA785GMT Mainboard")
CHIP_NAME("GIGABYTE MA785GMT-UD2H Mainboard")
.enable_dev = ma785gmt_enable,
};