soc/amd: factor out common SMM relocation code
The common code gets moved to soc/amd/common/block/cpu/smm, since it is related to the CPU cores and soc/amd/common/block/smi is about the SMI/ SCI functionality in the FCH part. Also relocation_handler gets renamed to smm_relocation_handler to keep it clear what it does, since it got moved to another compilation unit. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I45224131dfd52247018c5ca19cb37c44062b03eb Reviewed-on: https://review.coreboot.org/c/coreboot/+/50462 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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parent
a6fc2125e7
commit
bc134812c3
9 changed files with 79 additions and 96 deletions
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@ -32,6 +32,7 @@ config SOC_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_PSP_GEN2
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select SOC_AMD_COMMON_BLOCK_PSP_GEN2
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select SOC_AMD_COMMON_BLOCK_SMBUS
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select SOC_AMD_COMMON_BLOCK_SMBUS
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select SOC_AMD_COMMON_BLOCK_SMI
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select SOC_AMD_COMMON_BLOCK_SMI
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select SOC_AMD_COMMON_BLOCK_SMM
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select SOC_AMD_COMMON_BLOCK_SPI
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select SOC_AMD_COMMON_BLOCK_SPI
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select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
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select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
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select SOC_AMD_COMMON_BLOCK_UART
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select SOC_AMD_COMMON_BLOCK_UART
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@ -28,6 +28,12 @@ config MEMLAYOUT_LD_FILE
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endif # SOC_AMD_COMMON_BLOCK_NONCAR
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endif # SOC_AMD_COMMON_BLOCK_NONCAR
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config SOC_AMD_COMMON_BLOCK_SMM
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bool
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default n
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help
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Add common SMM relocation and handler functionality to the build.
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config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
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config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
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bool
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bool
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select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function
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select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function
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5
src/soc/amd/common/block/cpu/smm/Makefile.inc
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5
src/soc/amd/common/block/cpu/smm/Makefile.inc
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@ -0,0 +1,5 @@
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ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_SMM),y)
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ramstage-y += smm_relocate.c
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endif # CONFIG_SOC_AMD_COMMON_BLOCK_SMM
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49
src/soc/amd/common/block/cpu/smm/smm_relocate.c
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49
src/soc/amd/common/block/cpu/smm/smm_relocate.c
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@ -0,0 +1,49 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/smm.h>
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#include <console/console.h>
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#include <cpu/amd/amd64_save_state.h>
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#include <cpu/amd/msr.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/smm.h>
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#include <types.h>
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static struct smm_relocation_params smm_reloc_params;
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static void fill_in_relocation_params(struct smm_relocation_params *params)
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{
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uintptr_t tseg_base;
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size_t tseg_size;
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smm_region(&tseg_base, &tseg_size);
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params->tseg_base.lo = ALIGN_DOWN(tseg_base, 128 * KiB);
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params->tseg_base.hi = 0;
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params->tseg_mask.lo = ALIGN_DOWN(~(tseg_size - 1), 128 * KiB);
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params->tseg_mask.hi = ((1 << (cpu_phys_address_size() - 32)) - 1);
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params->tseg_mask.lo |= SMM_TSEG_WB;
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}
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void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size)
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{
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printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
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fill_in_relocation_params(&smm_reloc_params);
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smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
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*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
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}
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void smm_relocation_handler(int cpu, uintptr_t curr_smbase, uintptr_t staggered_smbase)
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{
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struct smm_relocation_params *relo_params = &smm_reloc_params;
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amd64_smm_state_save_area_t *smm_state;
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wrmsr(SMM_ADDR_MSR, relo_params->tseg_base);
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wrmsr(SMM_MASK_MSR, relo_params->tseg_mask);
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smm_state = (void *)(SMM_AMD64_SAVE_STATE_OFFSET + curr_smbase);
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smm_state->smbase = staggered_smbase;
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}
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12
src/soc/amd/common/block/include/amdblocks/smm.h
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12
src/soc/amd/common/block/include/amdblocks/smm.h
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@ -0,0 +1,12 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <cpu/x86/msr.h>
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#include <types.h>
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struct smm_relocation_params {
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msr_t tseg_base;
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msr_t tseg_mask;
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};
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void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size);
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void smm_relocation_handler(int cpu, uintptr_t curr_smbase, uintptr_t staggered_smbase);
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@ -42,6 +42,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_SATA
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select SOC_AMD_COMMON_BLOCK_SATA
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select SOC_AMD_COMMON_BLOCK_SMBUS
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select SOC_AMD_COMMON_BLOCK_SMBUS
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select SOC_AMD_COMMON_BLOCK_SMI
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select SOC_AMD_COMMON_BLOCK_SMI
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select SOC_AMD_COMMON_BLOCK_SMM
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select SOC_AMD_COMMON_BLOCK_SMU
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select SOC_AMD_COMMON_BLOCK_SMU
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select SOC_AMD_COMMON_BLOCK_SPI
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select SOC_AMD_COMMON_BLOCK_SPI
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select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
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select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
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@ -1,13 +1,12 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/cpu.h>
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#include <amdblocks/cpu.h>
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#include <amdblocks/smm.h>
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#include <cpu/cpu.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/mp.h>
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#include <cpu/x86/mp.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/smm.h>
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#include <cpu/x86/smm.h>
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#include <cpu/amd/msr.h>
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#include <cpu/amd/amd64_save_state.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/lapic.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <device/pci_ops.h>
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#include <device/pci_ops.h>
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@ -22,12 +21,6 @@
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/*
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/*
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* MP and SMM loading initialization.
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* MP and SMM loading initialization.
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*/
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*/
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struct smm_relocation_params {
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msr_t tseg_base;
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msr_t tseg_mask;
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};
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static struct smm_relocation_params smm_reloc_params;
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/*
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/*
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* Do essential initialization tasks before APs can be fired up -
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* Do essential initialization tasks before APs can be fired up -
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@ -42,45 +35,6 @@ static void pre_mp_init(void)
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x86_mtrr_check();
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x86_mtrr_check();
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}
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}
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static void fill_in_relocation_params(struct smm_relocation_params *params)
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{
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uintptr_t tseg_base;
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size_t tseg_size;
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smm_region(&tseg_base, &tseg_size);
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params->tseg_base.lo = ALIGN_DOWN(tseg_base, 128 * KiB);
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params->tseg_base.hi = 0;
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params->tseg_mask.lo = ALIGN_DOWN(~(tseg_size - 1), 128 * KiB);
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params->tseg_mask.hi = ((1 << (cpu_phys_address_size() - 32)) - 1);
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params->tseg_mask.lo |= SMM_TSEG_WB;
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}
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static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
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size_t *smm_save_state_size)
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{
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printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
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fill_in_relocation_params(&smm_reloc_params);
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smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
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*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
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}
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static void relocation_handler(int cpu, uintptr_t curr_smbase,
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uintptr_t staggered_smbase)
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{
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struct smm_relocation_params *relo_params = &smm_reloc_params;
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amd64_smm_state_save_area_t *smm_state;
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wrmsr(SMM_ADDR_MSR, relo_params->tseg_base);
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wrmsr(SMM_MASK_MSR, relo_params->tseg_mask);
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smm_state = (void *)(SMM_AMD64_SAVE_STATE_OFFSET + curr_smbase);
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smm_state->smbase = staggered_smbase;
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}
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static void post_mp_init(void)
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static void post_mp_init(void)
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{
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{
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global_smi_enable();
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global_smi_enable();
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@ -91,7 +45,7 @@ static const struct mp_ops mp_ops = {
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.pre_mp_init = pre_mp_init,
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.pre_mp_init = pre_mp_init,
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.get_cpu_count = get_cpu_count,
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.get_cpu_count = get_cpu_count,
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.get_smm_info = get_smm_info,
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.get_smm_info = get_smm_info,
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.relocation_handler = relocation_handler,
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.relocation_handler = smm_relocation_handler,
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.post_mp_init = post_mp_init,
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.post_mp_init = post_mp_init,
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};
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};
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select SOC_AMD_COMMON_BLOCK_SATA
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select SOC_AMD_COMMON_BLOCK_SATA
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select SOC_AMD_COMMON_BLOCK_SMBUS
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select SOC_AMD_COMMON_BLOCK_SMBUS
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select SOC_AMD_COMMON_BLOCK_SMI
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select SOC_AMD_COMMON_BLOCK_SMI
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select SOC_AMD_COMMON_BLOCK_SMM
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select SOC_AMD_COMMON_BLOCK_SPI
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select SOC_AMD_COMMON_BLOCK_SPI
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select SOC_AMD_COMMON_BLOCK_UART
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select SOC_AMD_COMMON_BLOCK_UART
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select SSE2
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select SSE2
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@ -1,12 +1,11 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/smm.h>
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#include <cpu/cpu.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/mp.h>
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#include <cpu/x86/mp.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/smm.h>
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#include <cpu/x86/smm.h>
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#include <cpu/amd/msr.h>
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#include <cpu/amd/amd64_save_state.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/lapic.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <device/pci_ops.h>
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#include <device/pci_ops.h>
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/*
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/*
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* MP and SMM loading initialization.
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* MP and SMM loading initialization.
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*/
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*/
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struct smm_relocation_params {
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msr_t tseg_base;
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msr_t tseg_mask;
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};
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static struct smm_relocation_params smm_reloc_params;
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/*
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/*
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* Do essential initialization tasks before APs can be fired up -
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* Do essential initialization tasks before APs can be fired up -
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+ 1;
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+ 1;
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}
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}
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static void fill_in_relocation_params(struct smm_relocation_params *params)
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{
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uintptr_t tseg_base;
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size_t tseg_size;
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smm_region(&tseg_base, &tseg_size);
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params->tseg_base.lo = ALIGN_DOWN(tseg_base, 128 * KiB);
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params->tseg_base.hi = 0;
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params->tseg_mask.lo = ALIGN_DOWN(~(tseg_size - 1), 128 * KiB);
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params->tseg_mask.hi = ((1 << (cpu_phys_address_size() - 32)) - 1);
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params->tseg_mask.lo |= SMM_TSEG_WB;
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}
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static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
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size_t *smm_save_state_size)
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{
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printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
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fill_in_relocation_params(&smm_reloc_params);
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smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
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*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
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}
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static void relocation_handler(int cpu, uintptr_t curr_smbase,
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uintptr_t staggered_smbase)
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{
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struct smm_relocation_params *relo_params = &smm_reloc_params;
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amd64_smm_state_save_area_t *smm_state;
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wrmsr(SMM_ADDR_MSR, relo_params->tseg_base);
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wrmsr(SMM_MASK_MSR, relo_params->tseg_mask);
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smm_state = (void *)(SMM_AMD64_SAVE_STATE_OFFSET + curr_smbase);
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smm_state->smbase = staggered_smbase;
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}
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static const struct mp_ops mp_ops = {
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static const struct mp_ops mp_ops = {
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.pre_mp_init = pre_mp_init,
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.pre_mp_init = pre_mp_init,
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.get_cpu_count = get_cpu_count,
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.get_cpu_count = get_cpu_count,
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.get_smm_info = get_smm_info,
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.get_smm_info = get_smm_info,
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.relocation_handler = relocation_handler,
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.relocation_handler = smm_relocation_handler,
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.post_mp_init = global_smi_enable,
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.post_mp_init = global_smi_enable,
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};
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};
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