libpayload/x86: Try to discover invariant TSC rate

We can skip the PIT-based TSC calibration if we can derive the invariant
TSC rate from CPUID/MSR data. This is necessary if the PIT is disabled,
which is the default, for instance, on Coffee Lake CPUs.

This implementation should cover all Intel Core i processors at least.
For older processors, we fall back to the PIT calibration.

Change-Id: Ic6607ee2a8b41c2be9dc1bb4f1e23e652bb33889
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34170
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Nico Huber 2019-07-03 15:48:54 +02:00 committed by Patrick Georgi
parent 5c9d82bd73
commit bc2c12c728
1 changed files with 116 additions and 3 deletions

View File

@ -33,6 +33,10 @@
#include <libpayload.h>
#include <arch/rdtsc.h>
#include <arch/cpuid.h>
#include <arch/msr.h>
#define MSR_PLATFORM_INFO 0xce
/**
* @ingroup arch
@ -41,11 +45,11 @@
uint32_t cpu_khz;
/**
* Calculate the speed of the processor for use in delays.
* @brief Measure the speed of the processor for use in delays
*
* @return The CPU speed in kHz.
*/
unsigned int get_cpu_speed(void)
static unsigned int calibrate_pit(void)
{
unsigned long long start, end;
const uint32_t clock_rate = 1193182; // 1.193182 MHz
@ -71,7 +75,116 @@ unsigned int get_cpu_speed(void)
* clock_rate / (interval * 1000). Multiply that by the number of
* measured clocks to get the kHz value.
*/
cpu_khz = (end - start) * clock_rate / (1000 * interval);
return (end - start) * clock_rate / (1000 * interval);
}
/**
* @brief Calculates the core clock frequency via CPUID 0x15
*
* Newer Intel CPUs report their core clock in CPUID leaf 0x15. Early models
* supporting this leaf didn't provide the nominal crystal frequency in ecx,
* hence we use hard coded values for them.
*/
static int get_cpu_khz_xtal(void)
{
uint32_t ecx, edx, num, denom;
uint64_t nominal;
if (cpuid_max() < 0x15)
return -1;
cpuid(0x15, denom, num, ecx, edx);
if (denom == 0 || num == 0)
return -1;
if (ecx != 0) {
nominal = ecx;
} else {
if (cpuid_family() != 6)
return -1;
switch (cpuid_model()) {
case SKYLAKE_U_Y:
case SKYLAKE_S_H:
case KABYLAKE_U_Y:
case KABYLAKE_S_H:
nominal = 24000000;
break;
case APOLLOLAKE:
nominal = 19200000;
break;
default:
return -1;
}
}
return nominal * num / denom / 1000;
}
/**
* @brief Returns three times the bus clock in kHz
*
* The result of calculations with the returned value shall be divided by 3.
* This helps to avoid rounding errors.
*/
static int get_bus_khz_x3(void)
{
if (cpuid_family() != 6)
return -1;
switch (cpuid_model()) {
case NEHALEM:
return 400 * 1000; /* 133 MHz */
case SANDYBRIDGE:
case IVYBRIDGE:
case HASWELL:
case HASWELL_U:
case HASWELL_GT3E:
case BROADWELL:
case BROADWELL_U:
return 300 * 1000; /* 100 MHz */
default:
return -1;
}
}
/**
* @brief Returns the calculated CPU frequency
*
* Over the years, multiple ways to discover the CPU frequency have been
* exposed through CPUID and MSRs. Try the most recent and accurate first
* (crystal information in CPUID leaf 0x15) and then fall back to older
* methods.
*
* This should cover all Intel Core i processors at least. For older
* processors we fall back to the PIT calibration.
*/
static int get_cpu_khz_fast(void)
{
/* Try core crystal clock frequency first (supposed to be more accurate). */
const int cpu_khz_xtal = get_cpu_khz_xtal();
if (cpu_khz_xtal > 0)
return cpu_khz_xtal;
/* Try `bus clock * speedstep multiplier`. */
const int bus_x3 = get_bus_khz_x3();
if (bus_x3 <= 0)
return -1;
/*
* Systems with an invariant TSC report the multiplier (maximum
* non-turbo ratio) in MSR_PLATFORM_INFO[15:8].
*/
const unsigned int mult = _rdmsr(MSR_PLATFORM_INFO) >> 8 & 0xff;
return bus_x3 * mult / 3;
}
unsigned int get_cpu_speed(void)
{
const int cpu_khz_fast = get_cpu_khz_fast();
if (cpu_khz_fast > 0)
cpu_khz = (unsigned int)cpu_khz_fast;
else
cpu_khz = calibrate_pit();
return cpu_khz;
}