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binaryPI boards: Minor fixups to unify boards 

Some missing static declarations and whitespace on the console.

Change-Id: I1af59dbfb1396297bd671b43d9326dffdd7f59d4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10284
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
This commit is contained in:
Kyösti Mälkki 2015-05-23 14:19:11 +03:00
parent 9d035fa1f7
commit bc3cee538d
6 changed files with 15 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/amd/lamar/BiosCallOuts.c
View File

@ -300,7 +300,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
AMD_CONFIG_PARAMS *StdHeader = (AMD_CONFIG_PARAMS *)ConfigPtr;
if (StdHeader->Func == AMD_INIT_RESET) {
FCH_RESET_DATA_BLOCK *FchParams = (FCH_RESET_DATA_BLOCK *) FchData;
printk(BIOS_DEBUG, "\nFch OEM config in INIT RESET\n");
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
//FchParams->EcChannel0 = TRUE; /* logical devicd 3 */
FchParams->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);

4
src/mainboard/amd/lamar/PlatformGnbPcie.c
View File

@ -22,7 +22,7 @@
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
const PCIe_PORT_DESCRIPTOR PortList [] = {
static const PCIe_PORT_DESCRIPTOR PortList [] = {
/*
* Lanes to pins to PCI device mapping can be found in section 2.12 of the
@ -107,7 +107,7 @@ static const PCIe_DDI_DESCRIPTOR DdiList [] = {
},
};
const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
.Flags = DESCRIPTOR_TERMINATE_LIST,
.SocketId = 0,
.PciePortList = PortList,

2
src/mainboard/amd/olivehillplus/BiosCallOuts.c
View File

@ -266,7 +266,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
AMD_CONFIG_PARAMS *StdHeader = (AMD_CONFIG_PARAMS *)ConfigPtr;
if (StdHeader->Func == AMD_INIT_RESET) {
FCH_RESET_DATA_BLOCK *FchParams = (FCH_RESET_DATA_BLOCK *) FchData;
printk(BIOS_DEBUG, "\nFch OEM config in INIT RESET\n");
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
FchParams->LegacyFree = CONFIG_HUDSON_LEGACY_FREE;
FchParams->FchReset.SataEnable = hudson_sata_enable();

6
src/mainboard/amd/olivehillplus/PlatformGnbPcie.c
View File

@ -21,7 +21,7 @@
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
const PCIe_PORT_DESCRIPTOR PortList [] = {
static const PCIe_PORT_DESCRIPTOR PortList [] = {
{
0,
PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 3, 3),
@ -73,7 +73,7 @@ const PCIe_PORT_DESCRIPTOR PortList [] = {
}
};
const PCIe_DDI_DESCRIPTOR DdiList [] = {
static const PCIe_DDI_DESCRIPTOR DdiList [] = {
/* DP0 to HDMI0/DP */
{
0,
@ -94,7 +94,7 @@ const PCIe_DDI_DESCRIPTOR DdiList [] = {
},
};
const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
.Flags = DESCRIPTOR_TERMINATE_LIST,
.SocketId = 0,
.PciePortList = PortList,

4
src/mainboard/amd/olivehillplus/acpi/sleep.asl
View File

@ -26,7 +26,7 @@ Name(WKST,Package(){Zero, Zero})
* Entry:
* Arg0=The value of the sleeping state S1=1, S2=2, etc
*
*s Exit:
* Exit:
* -none-
*
* The _PTS control method is executed at the beginning of the sleep process
@ -89,6 +89,8 @@ Method(\_WAK, 1) {
/* DBGO("From S") */
/* DBGO(Arg0) */
/* DBGO(" to S0\n") */
/* clear USB wake up signal */
Store(1, USBS)
\_SB.AWAK(Arg0)

4
src/mainboard/biostar/am1ml/BiosCallOuts.c
View File

@ -116,7 +116,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
if (StdHeader->Func == AMD_INIT_RESET) {
FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET \n");
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
FchParams_reset->FchReset.Xhci1Enable = FALSE;
FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
@ -124,7 +124,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
FchParams_reset->FchReset.IdeEnable = 0;
} else if (StdHeader->Func == AMD_INIT_ENV) {
FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT ENV\n");
printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
/* Azalia Controller OEM Codec Table Pointer */
FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST*)(&CodecTableList[0]);