diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb
index ed47820f39..689babb5a5 100644
--- a/src/mainboard/google/lars/devicetree.cb
+++ b/src/mainboard/google/lars/devicetree.cb
@@ -30,6 +30,7 @@ chip soc/intel/skylake
 	register "SkipExtGfxScan" = "1"
 	register "Device4Enable" = "1"
 	register "HeciEnabled" = "0"
+	register "SaGv" = "3"
 	register "FspSkipMpInit" = "1"
 
 	# Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch