From bc5f51fa56166e6c2dff273fefba4f3ea7e8bac2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Mon, 18 Oct 2021 19:54:21 +0200 Subject: [PATCH] soc/intel/{skl,apl}: don't run or even include SGX code if disabled MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do not run or include any code in case the user did not explicitly enable SGX through `SOC_INTEL_COMMON_BLOCK_SGX_ENABLE`. Also move the ifdef inside the ASL file. Change-Id: Iec4d3d3eb2811ec14d29aff9601ba325724bc28c Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/58426 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Angel Pons Reviewed-by: Felix Singer --- src/soc/intel/apollolake/acpi.c | 2 +- src/soc/intel/apollolake/acpi/southbridge.asl | 2 -- src/soc/intel/common/acpi/sgx.asl | 2 ++ src/soc/intel/common/block/sgx/Makefile.inc | 2 +- src/soc/intel/skylake/acpi/pch.asl | 2 -- 5 files changed, 4 insertions(+), 6 deletions(-) diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index 6e3bde4bb9..4f5029e5ac 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -88,7 +88,7 @@ void soc_fill_gnvs(struct global_nvs *gnvs) gnvs->scdo = gpio_acpi_pin(cfg->sdcard_cd_gpio); } - if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX)) + if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE)) sgx_fill_gnvs(gnvs); /* Fill in Above 4GB MMIO resource */ diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl index f4d1497223..f857bb97a0 100644 --- a/src/soc/intel/apollolake/acpi/southbridge.asl +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -30,6 +30,4 @@ #include /* SGX */ -#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX) #include -#endif diff --git a/src/soc/intel/common/acpi/sgx.asl b/src/soc/intel/common/acpi/sgx.asl index c0b8040729..9aea7a8b09 100644 --- a/src/soc/intel/common/acpi/sgx.asl +++ b/src/soc/intel/common/acpi/sgx.asl @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) Scope(\_SB) { // Secure Enclave memory @@ -54,3 +55,4 @@ Scope(\_SB) } // end EPC Device } // End of Scope(\_SB) +#endif diff --git a/src/soc/intel/common/block/sgx/Makefile.inc b/src/soc/intel/common/block/sgx/Makefile.inc index 3fa18d8873..ce3c436141 100644 --- a/src/soc/intel/common/block/sgx/Makefile.inc +++ b/src/soc/intel/common/block/sgx/Makefile.inc @@ -1 +1 @@ -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX) += sgx.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) += sgx.c diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index e088ca1782..0aa8f95761 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -62,6 +62,4 @@ Method (_OSC, 4) } /* SGX */ -#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX) #include -#endif